Commit fbfaa507 authored by Francisco Iglesias's avatar Francisco Iglesias Committed by Peter Maydell
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xilinx_spips: Add support for 4 byte addresses in the LQSPI 



Add support for 4 byte addresses in the LQSPI and correct LQSPI_CFG_SEP_BUS.

Signed-off-by: default avatarFrancisco Iglesias <frasse.iglesias@gmail.com>
Reviewed-by: default avatarAlistair Francis <alistair.francis@xilinx.com>
Reviewed-by: default avatarEdgar E. Iglesias <edgar.iglesias@xilinx.com>
Tested-by: default avatarEdgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 20171126231634.9531-11-frasse.iglesias@gmail.com
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent 275e28cc

hw/ssi/xilinx_spips.c

+5 −1
Original line number Diff line number Diff line
@@ -92,8 +92,9 @@ 
#define R_LQSPI_CFG_RESET       0x03A002EB

#define LQSPI_CFG_LQ_MODE       (1U << 31)

#define LQSPI_CFG_TWO_MEM       (1 << 30)

#define LQSPI_CFG_SEP_BUS       (1 << 30)

#define LQSPI_CFG_SEP_BUS       (1 << 29)

#define LQSPI_CFG_U_PAGE        (1 << 28)

#define LQSPI_CFG_ADDR4         (1 << 27)

#define LQSPI_CFG_MODE_EN       (1 << 25)

#define LQSPI_CFG_MODE_WIDTH    8

#define LQSPI_CFG_MODE_SHIFT    16
@@ -702,6 +703,9 @@ static void lqspi_load_cache(void *opaque, hwaddr addr) 
        fifo8_push(&s->tx_fifo, s->regs[R_LQSPI_CFG] & LQSPI_CFG_INST_CODE);

        /* read address */

        DB_PRINT_L(0, "pushing read address %06x\n", flash_addr);

        if (s->regs[R_LQSPI_CFG] & LQSPI_CFG_ADDR4) {

            fifo8_push(&s->tx_fifo, (uint8_t)(flash_addr >> 24));

        }

        fifo8_push(&s->tx_fifo, (uint8_t)(flash_addr >> 16));

        fifo8_push(&s->tx_fifo, (uint8_t)(flash_addr >> 8));

        fifo8_push(&s->tx_fifo, (uint8_t)flash_addr);