Commit fa4faba4 authored by Richard Henderson's avatar Richard Henderson Committed by Peter Maydell
Browse files

target-mips: Use cpu_exec_interrupt qom hook 



Cc: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: default avatarRichard Henderson <rth@twiddle.net>
Reviewed-by: default avatarLeon Alrae <leon.alrae@imgtec.com>
Tested-by: default avatarLeon Alrae <leon.alrae@imgtec.com>
Message-id: 1410626734-3804-19-git-send-email-rth@twiddle.net
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent dfdb4834

cpu-exec.c

+0 −9
Original line number Diff line number Diff line
@@ -514,15 +514,6 @@ int cpu_exec(CPUArchState *env) 
                        cc->do_interrupt(cpu);

                        next_tb = 0;

                    }

#elif defined(TARGET_MIPS)

                    if ((interrupt_request & CPU_INTERRUPT_HARD) &&

                        cpu_mips_hw_interrupts_pending(env)) {

                        /* Raise it */

                        cpu->exception_index = EXCP_EXT_INTERRUPT;

                        env->error_code = 0;

                        cc->do_interrupt(cpu);

                        next_tb = 0;

                    }

#endif

                    /* The target hook has 3 exit conditions:

                       False when the interrupt isn't processed,

target-mips/cpu-qom.h

+1 −0
Original line number Diff line number Diff line
@@ -75,6 +75,7 @@ static inline MIPSCPU *mips_env_get_cpu(CPUMIPSState *env) 
#define ENV_OFFSET offsetof(MIPSCPU, env)



void mips_cpu_do_interrupt(CPUState *cpu);

bool mips_cpu_exec_interrupt(CPUState *cpu, int int_req);

void mips_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,

                         int flags);

hwaddr mips_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);

target-mips/cpu.c

+1 −0
Original line number Diff line number Diff line
@@ -136,6 +136,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data) 


    cc->has_work = mips_cpu_has_work;

    cc->do_interrupt = mips_cpu_do_interrupt;

    cc->cpu_exec_interrupt = mips_cpu_exec_interrupt;

    cc->dump_state = mips_cpu_dump_state;

    cc->set_pc = mips_cpu_set_pc;

    cc->synchronize_from_tb = mips_cpu_synchronize_from_tb;

target-mips/helper.c

+17 −0
Original line number Diff line number Diff line
@@ -675,6 +675,23 @@ void mips_cpu_do_interrupt(CPUState *cs) 
    cs->exception_index = EXCP_NONE;

}



bool mips_cpu_exec_interrupt(CPUState *cs, int interrupt_request)

{

    if (interrupt_request & CPU_INTERRUPT_HARD) {

        MIPSCPU *cpu = MIPS_CPU(cs);

        CPUMIPSState *env = &cpu->env;



        if (cpu_mips_hw_interrupts_pending(env)) {

            /* Raise it */

            cs->exception_index = EXCP_EXT_INTERRUPT;

            env->error_code = 0;

            mips_cpu_do_interrupt(cs);

            return true;

        }

    }

    return false;

}



#if !defined(CONFIG_USER_ONLY)

void r4k_invalidate_tlb (CPUMIPSState *env, int idx, int use_extra)

{