Commit fa394ed6 authored by Marc-André Lureau's avatar Marc-André Lureau Committed by Paolo Bonzini
Browse files

char: make some qemu_chr_fe skip if no driver



In most cases, front ends do not care about the side effect of
CharBackend, so we can simply skip the checks and call the qemu_chr_fe
functions even without associated CharDriver.

Signed-off-by: default avatarMarc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20161022095318.17775-20-marcandre.lureau@redhat.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent c39860e6
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+3 −5
Original line number Diff line number Diff line
@@ -1903,7 +1903,7 @@ static void pxa2xx_fir_write(void *opaque, hwaddr addr,
        } else {
            ch = ~value;
        }
        if (s->chr.chr && s->enable && (s->control[0] & (1 << 3))) { /* TXE */
        if (s->enable && (s->control[0] & (1 << 3))) { /* TXE */
            /* XXX this blocks entire thread. Rewrite to use
             * qemu_chr_fe_write and background I/O callbacks */
            qemu_chr_fe_write_all(&s->chr, &ch, 1);
@@ -1975,11 +1975,9 @@ static void pxa2xx_fir_realize(DeviceState *dev, Error **errp)
{
    PXA2xxFIrState *s = PXA2XX_FIR(dev);

    if (s->chr.chr) {
    qemu_chr_fe_set_handlers(&s->chr, pxa2xx_fir_is_empty,
                             pxa2xx_fir_rx, pxa2xx_fir_event, s, NULL);
}
}

static bool pxa2xx_fir_vmstate_validate(void *opaque, int version_id)
{
+6 −10
Original line number Diff line number Diff line
@@ -1020,9 +1020,7 @@ static void strongarm_uart_update_parameters(StrongARMUARTState *s)
    ssp.data_bits = data_bits;
    ssp.stop_bits = stop_bits;
    s->char_transmit_time =  (NANOSECONDS_PER_SECOND / speed) * frame_size;
    if (s->chr.chr) {
    qemu_chr_fe_ioctl(&s->chr, CHR_IOCTL_SERIAL_SET_PARAMS, &ssp);
    }

    DPRINTF(stderr, "%s speed=%d parity=%c data=%d stop=%d\n", s->chr->label,
            speed, parity, data_bits, stop_bits);
@@ -1239,14 +1237,12 @@ static void strongarm_uart_init(Object *obj)
    s->rx_timeout_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, strongarm_uart_rx_to, s);
    s->tx_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, strongarm_uart_tx, s);

    if (s->chr.chr) {
    qemu_chr_fe_set_handlers(&s->chr,
                             strongarm_uart_can_receive,
                             strongarm_uart_receive,
                             strongarm_uart_event,
                             s, NULL);
}
}

static void strongarm_uart_reset(DeviceState *dev)
{
+6 −12
Original line number Diff line number Diff line
@@ -79,9 +79,7 @@ static uint64_t bcm2835_aux_read(void *opaque, hwaddr offset, unsigned size)
                s->read_pos = 0;
            }
        }
        if (s->chr.chr) {
        qemu_chr_fe_accept_input(&s->chr);
        }
        bcm2835_aux_update(s);
        return c;

@@ -168,11 +166,9 @@ static void bcm2835_aux_write(void *opaque, hwaddr offset, uint64_t value,
    case AUX_MU_IO_REG:
        /* "DLAB bit set means access baudrate register" is NYI */
        ch = value;
        if (s->chr.chr) {
        /* XXX this blocks entire thread. Rewrite to use
         * qemu_chr_fe_write and background I/O callbacks */
        qemu_chr_fe_write_all(&s->chr, &ch, 1);
        }
        break;

    case AUX_MU_IER_REG:
@@ -282,11 +278,9 @@ static void bcm2835_aux_realize(DeviceState *dev, Error **errp)
{
    BCM2835AuxState *s = BCM2835_AUX(dev);

    if (s->chr.chr) {
    qemu_chr_fe_set_handlers(&s->chr, bcm2835_aux_can_receive,
                             bcm2835_aux_receive, NULL, s, NULL);
}
}

static Property bcm2835_aux_props[] = {
    DEFINE_PROP_CHR("chardev", BCM2835AuxState, chr),
+7 −17
Original line number Diff line number Diff line
@@ -142,10 +142,8 @@ static void uart_rx_reset(CadenceUARTState *s)
{
    s->rx_wpos = 0;
    s->rx_count = 0;
    if (s->chr.chr) {
    qemu_chr_fe_accept_input(&s->chr);
}
}

static void uart_tx_reset(CadenceUARTState *s)
{
@@ -156,11 +154,9 @@ static void uart_send_breaks(CadenceUARTState *s)
{
    int break_enabled = 1;

    if (s->chr.chr) {
    qemu_chr_fe_ioctl(&s->chr, CHR_IOCTL_SERIAL_SET_BREAK,
                      &break_enabled);
}
}

static void uart_parameters_setup(CadenceUARTState *s)
{
@@ -210,10 +206,8 @@ static void uart_parameters_setup(CadenceUARTState *s)

    packet_size += ssp.data_bits + ssp.stop_bits;
    s->char_tx_time = (NANOSECONDS_PER_SECOND / ssp.speed) * packet_size;
    if (s->chr.chr) {
    qemu_chr_fe_ioctl(&s->chr, CHR_IOCTL_SERIAL_SET_PARAMS, &ssp);
}
}

static int uart_can_receive(void *opaque)
{
@@ -368,9 +362,7 @@ static void uart_read_rx_fifo(CadenceUARTState *s, uint32_t *c)
        *c = s->rx_fifo[rx_rpos];
        s->rx_count--;

        if (s->chr.chr) {
        qemu_chr_fe_accept_input(&s->chr);
        }
    } else {
        *c = 0;
    }
@@ -474,11 +466,9 @@ static void cadence_uart_realize(DeviceState *dev, Error **errp)
    s->fifo_trigger_handle = timer_new_ns(QEMU_CLOCK_VIRTUAL,
                                          fifo_trigger_update, s);

    if (s->chr.chr) {
    qemu_chr_fe_set_handlers(&s->chr, uart_can_receive, uart_receive,
                             uart_event, s, NULL);
}
}

static void cadence_uart_init(Object *obj)
{
+5 −9
Original line number Diff line number Diff line
@@ -76,11 +76,9 @@ static void digic_uart_write(void *opaque, hwaddr addr, uint64_t value,

    switch (addr) {
    case R_TX:
        if (s->chr.chr) {
        /* XXX this blocks entire thread. Rewrite to use
         * qemu_chr_fe_write and background I/O callbacks */
        qemu_chr_fe_write_all(&s->chr, &ch, 1);
        }
        break;

    case R_ST:
@@ -147,11 +145,9 @@ static void digic_uart_realize(DeviceState *dev, Error **errp)
{
    DigicUartState *s = DIGIC_UART(dev);

    if (s->chr.chr) {
    qemu_chr_fe_set_handlers(&s->chr, uart_can_rx, uart_rx,
                             uart_event, s, NULL);
}
}

static void digic_uart_init(Object *obj)
{
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