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in which individual CPUs are reset. It will ease the introduction of future change reseting the interrupt presenter from the CPU reset handler. Signed-off-by:Cédric Le Goater <clg@kaod.org> Reviewed-by:
Greg Kurz <groug@kaod.org> Message-Id: <20191022163812.330-4-clg@kaod.org> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>