Commit f900b1e5 authored by Jean-Hugues Deschênes's avatar Jean-Hugues Deschênes Committed by Peter Maydell
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target/arm: Fix handling of cortex-m FTYPE flag in EXCRET 



According to the PushStack() pseudocode in the armv7m RM,
bit 4 of the LR should be set to NOT(CONTROL.PFCA) when
an FPU is present. Current implementation is doing it for
armv8, but not for armv7. This patch makes the existing
logic applicable to both code paths.

Signed-off-by: default avatarJean-Hugues Deschenes <jean-hugues.deschenes@ossiaco.com>
Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent 4ecc9842

target/arm/m_helper.c

+3 −4
Original line number Original line Diff line number Diff line
@@ -2233,19 +2233,18 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs) 
        if (env->v7m.secure) {

        if (env->v7m.secure) {

            lr |= R_V7M_EXCRET_S_MASK;

            lr |= R_V7M_EXCRET_S_MASK;

        }

        }

        if (!(env->v7m.control[M_REG_S] & R_V7M_CONTROL_FPCA_MASK)) {

            lr |= R_V7M_EXCRET_FTYPE_MASK;

        }

    } else {

    } else {

        lr = R_V7M_EXCRET_RES1_MASK |

        lr = R_V7M_EXCRET_RES1_MASK |

            R_V7M_EXCRET_S_MASK |

            R_V7M_EXCRET_S_MASK |

            R_V7M_EXCRET_DCRS_MASK |

            R_V7M_EXCRET_DCRS_MASK |

            R_V7M_EXCRET_FTYPE_MASK |

            R_V7M_EXCRET_ES_MASK;

            R_V7M_EXCRET_ES_MASK;

        if (env->v7m.control[M_REG_NS] & R_V7M_CONTROL_SPSEL_MASK) {

        if (env->v7m.control[M_REG_NS] & R_V7M_CONTROL_SPSEL_MASK) {

            lr |= R_V7M_EXCRET_SPSEL_MASK;

            lr |= R_V7M_EXCRET_SPSEL_MASK;

        }

        }

    }

    }

    if (!(env->v7m.control[M_REG_S] & R_V7M_CONTROL_FPCA_MASK)) {

        lr |= R_V7M_EXCRET_FTYPE_MASK;

    }

    if (!arm_v7m_is_handler_mode(env)) {

    if (!arm_v7m_is_handler_mode(env)) {

        lr |= R_V7M_EXCRET_MODE_MASK;

        lr |= R_V7M_EXCRET_MODE_MASK;

    }

    }