Commit f73a2575 authored by David Gibson's avatar David Gibson Committed by Alexander Graf
Browse files

pseries: More complete WIMG validation in H_ENTER code 



Currently our implementation of the H_ENTER hypercall, which inserts a
mapping in the hash page table assumes that only ordinary memory is ever
mapped, and only permits mapping attribute bits accordingly (WIMG==0010).

However, we intend to start adding emulated IO to the pseries platform
(and real IO with PCI passthrough on kvm) which means this simple test
will no longer suffice.

This patch extends the h_enter validation code to check if the given
address is a RAM address.  If it is it enforces WIMG==0010, otherwise
it assumes that it is an IO mapping and instead enforces WIMG=010x.

Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: default avatarAlexander Graf <agraf@suse.de>
parent 9dfef5aa

hw/spapr.c

+2 −1
Original line number Diff line number Diff line
@@ -336,7 +336,8 @@ static void ppc_spapr_init(ram_addr_t ram_size, 
    }



    /* allocate RAM */

    ram_offset = qemu_ram_alloc(NULL, "ppc_spapr.ram", ram_size);

    spapr->ram_limit = ram_size;

    ram_offset = qemu_ram_alloc(NULL, "ppc_spapr.ram", spapr->ram_limit);

    cpu_register_physical_memory(0, ram_size, ram_offset);



    /* allocate hash page table.  For now we always make this 16mb,

hw/spapr.h

+1 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ typedef struct sPAPREnvironment { 
    struct VIOsPAPRBus *vio_bus;

    struct icp_state *icp;



    target_phys_addr_t ram_limit;

    void *htab;

    long htab_size;

    target_phys_addr_t fdt_addr, rtas_addr;

hw/spapr_hcall.c

+18 −4
Original line number Diff line number Diff line
@@ -99,6 +99,8 @@ static target_ulong h_enter(CPUState *env, sPAPREnvironment *spapr, 
    target_ulong pte_index = args[1];

    target_ulong pteh = args[2];

    target_ulong ptel = args[3];

    target_ulong page_shift = 12;

    target_ulong raddr;

    target_ulong i;

    uint8_t *hpte;
@@ -111,6 +113,7 @@ static target_ulong h_enter(CPUState *env, sPAPREnvironment *spapr, 
#endif

        if ((ptel & 0xff000) == 0) {

            /* 16M page */

            page_shift = 24;

            /* lowest AVA bit must be 0 for 16M pages */

            if (pteh & 0x80) {

                return H_PARAMETER;
@@ -120,12 +123,23 @@ static target_ulong h_enter(CPUState *env, sPAPREnvironment *spapr, 
        }

    }



    /* FIXME: bounds check the pa? */

    raddr = (ptel & HPTE_R_RPN) & ~((1ULL << page_shift) - 1);



    /* Check WIMG */

    if (raddr < spapr->ram_limit) {

        /* Regular RAM - should have WIMG=0010 */

        if ((ptel & HPTE_R_WIMG) != HPTE_R_M) {

            return H_PARAMETER;

        }

    } else {

        /* Looks like an IO address */

        /* FIXME: What WIMG combinations could be sensible for IO?

         * For now we allow WIMG=010x, but are there others? */

        /* FIXME: Should we check against registered IO addresses? */

        if ((ptel & (HPTE_R_W | HPTE_R_I | HPTE_R_M)) != HPTE_R_I) {

            return H_PARAMETER;

        }

    }



    pteh &= ~0x60ULL;



    if ((pte_index * HASH_PTE_SIZE_64) & ~env->htab_mask) {