Commit f6768aa1 authored by Remi Denis-Courmont's avatar Remi Denis-Courmont Committed by Peter Maydell
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target/arm: fix AArch64 virtual address space size



Since QEMU does not support the ARMv8.2-LVA, Large Virtual Address,
extension (yet), the VA address space is 48-bits plus a sign bit. User
mode can only handle the positive half of the address space, so that
makes a limit of 48 bits.

(With LVA, it would be 53 and 52 bits respectively.)

The incorrectly large address space conflicts with PAuth instructions,
which use bits 48-54 and 56-63 for the pointer authentication code. This
also conflicts with (as yet unsupported by QEMU) data tagging and with
the ARMv8.5-MTE extension.

Signed-off-by: default avatarRemi Denis-Courmont <remi.denis.courmont@huawei.com>
Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent 87877543
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+1 −1
Original line number Diff line number Diff line
@@ -2512,7 +2512,7 @@ bool write_cpustate_to_list(ARMCPU *cpu);

#if defined(TARGET_AARCH64)
#  define TARGET_PHYS_ADDR_SPACE_BITS 48
#  define TARGET_VIRT_ADDR_SPACE_BITS 64
#  define TARGET_VIRT_ADDR_SPACE_BITS 48
#else
#  define TARGET_PHYS_ADDR_SPACE_BITS 40
#  define TARGET_VIRT_ADDR_SPACE_BITS 32