Commit f663faac authored by Nathan Rossi's avatar Nathan Rossi Committed by Stefan Hajnoczi
Browse files

net: xilinx_axienet.c: Add phy soft reset bit clearing 



Clear the BMCR Reset when writing to registers.

Signed-off-by: default avatarNathan Rossi <nathan.rossi@xilinx.com>
[ PC:
 * Trivial style fixes to commit message
]
Signed-off-by: default avatarPeter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: default avatarBeniamino Galvani <b.galvani@gmail.com>
Reviewed-by: default avatarEdgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: default avatarStefan Hajnoczi <stefanha@redhat.com>
parent b9259652

hw/net/xilinx_axienet.c

+3 −0
Original line number Diff line number Diff line
@@ -142,6 +142,9 @@ tdk_write(struct PHY *phy, unsigned int req, unsigned int data) 
            phy->regs[regnum] = data;

            break;

    }



    /* Unconditionally clear regs[BMCR][BMCR_RESET] */

    phy->regs[0] &= ~0x8000;

}



static void