Commit f5e34624 authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-jun-15-2020' into staging 



MIPS + misc queue for June 15th, 2020

# gpg: Signature made Mon 15 Jun 2020 20:05:25 BST
# gpg:                using RSA key D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [full]
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01  DD75 D497 2A89 67F7 5A65

* remotes/amarkovic/tags/mips-queue-jun-15-2020:
  translations: Add Swedish language
  MAINTAINERS: Adjust sh4 maintainership
  target/mips: msa: Split helpers for MULV.<B|H|W|D>
  target/mips: msa: Split helpers for SUBV.<B|H|W|D>
  target/mips: msa: Split helpers for SUBSUU_S.<B|H|W|D>
  target/mips: msa: Split helpers for SUBSUS_U.<B|H|W|D>
  target/mips: msa: Split helpers for SUBS_U.<B|H|W|D>
  target/mips: msa: Split helpers for SUBS_S.<B|H|W|D>
  target/mips: msa: Split helpers for DOTP_U.<H|W|D>
  target/mips: msa: Split helpers for DOTP_S.<H|W|D>
  target/mips: msa: Split helpers for DPSUB_U.<H|W|D>
  target/mips: msa: Split helpers for DPSUB_S.<H|W|D>
  target/mips: msa: Split helpers for DPADD_U.<H|W|D>
  target/mips: msa: Split helpers for DPADD_S.<H|W|D>
  target/mips: msa: Split helpers for MSUBV.<B|H|W|D>
  target/mips: msa: Split helpers for MADDV.<B|H|W|D>
  target/mips: Add comments for vendor-specific ASEs
  target/mips: Legalize Loongson insn flags

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 72fc7d7f 250bc43a

MAINTAINERS

+5 −3
Original line number Diff line number Diff line
@@ -296,7 +296,7 @@ F: tests/tcg/s390x/ 
L: qemu-s390x@nongnu.org



SH4 TCG CPUs

M: Aurelien Jarno <aurelien@aurel32.net>

M: Yoshinori Sato <ysato@users.sourceforge.jp>

S: Odd Fixes

F: target/sh4/

F: hw/sh4/
@@ -1253,14 +1253,16 @@ F: include/hw/riscv/opentitan.h 
SH4 Machines

------------

R2D

M: Magnus Damm <magnus.damm@gmail.com>

M: Yoshinori Sato <ysato@users.sourceforge.jp>

R: Magnus Damm <magnus.damm@gmail.com>

S: Maintained

F: hw/sh4/r2d.c

F: hw/intc/sh_intc.c

F: hw/timer/sh_timer.c



Shix

M: Magnus Damm <magnus.damm@gmail.com>

M: Yoshinori Sato <ysato@users.sourceforge.jp>

R: Magnus Damm <magnus.damm@gmail.com>

S: Odd Fixes

F: hw/sh4/shix.c

po/sv.po

0 → 100644
+75 −0
Original line number Diff line number Diff line 
# Swedish translation of qemu po-file.

# This file is put in the public domain.

# Sebastian Rasmussen <sebras@gmail.com>, 2019.

#

msgid ""

msgstr ""

"Project-Id-Version: QEMU 2.12.91\n"

"Report-Msgid-Bugs-To: qemu-devel@nongnu.org\n"

"POT-Creation-Date: 2018-07-18 07:56+0200\n"

"PO-Revision-Date: 2019-08-16 21:19+0200\n"

"Last-Translator: Sebastian Rasmussen <sebras@gmail.com>\n"

"Language-Team: Swedish <tp-sv@listor.tp-sv.se>\n"

"Language: sv\n"

"MIME-Version: 1.0\n"

"Content-Type: text/plain; charset=UTF-8\n"

"Content-Transfer-Encoding: 8bit\n"

"Plural-Forms: nplurals=2; plural=(n != 1);\n"

"X-Generator: Poedit 2.2.3\n"



msgid " - Press Ctrl+Alt+G to release grab"

msgstr " - Tryck Ctrl+Alt+G för att sluta fånga"



msgid " [Paused]"

msgstr " [Pausad]"



msgid "_Pause"

msgstr "_Paus"



msgid "_Reset"

msgstr "_Starta om"



msgid "Power _Down"

msgstr "Stäng _ner"



msgid "_Quit"

msgstr "_Avsluta"



msgid "_Fullscreen"

msgstr "_Helskärm"



msgid "_Copy"

msgstr "_Kopiera"



msgid "Zoom _In"

msgstr "Zooma _in"



msgid "Zoom _Out"

msgstr "Zooma _ut"



msgid "Best _Fit"

msgstr "Anpassad _storlek"



msgid "Zoom To _Fit"

msgstr "Zooma ti_ll anpassad storlek"



msgid "Grab On _Hover"

msgstr "Fånga vi_d hovring"



msgid "_Grab Input"

msgstr "Fån_ga inmatning"



msgid "Show _Tabs"

msgstr "Visa _flika"



msgid "Detach Tab"

msgstr "Frigör flik"



msgid "Show Menubar"

msgstr "Visa menyrad"



msgid "_Machine"

msgstr "_Maskin"



msgid "_View"

msgstr "_Visa"

target/mips/helper.h

+59 −14
Original line number Diff line number Diff line
@@ -950,6 +950,21 @@ DEF_HELPER_4(msa_mod_s_h, void, env, i32, i32, i32) 
DEF_HELPER_4(msa_mod_s_w, void, env, i32, i32, i32)

DEF_HELPER_4(msa_mod_s_d, void, env, i32, i32, i32)



DEF_HELPER_4(msa_maddv_b, void, env, i32, i32, i32)

DEF_HELPER_4(msa_maddv_h, void, env, i32, i32, i32)

DEF_HELPER_4(msa_maddv_w, void, env, i32, i32, i32)

DEF_HELPER_4(msa_maddv_d, void, env, i32, i32, i32)



DEF_HELPER_4(msa_msubv_b, void, env, i32, i32, i32)

DEF_HELPER_4(msa_msubv_h, void, env, i32, i32, i32)

DEF_HELPER_4(msa_msubv_w, void, env, i32, i32, i32)

DEF_HELPER_4(msa_msubv_d, void, env, i32, i32, i32)



DEF_HELPER_4(msa_mulv_b, void, env, i32, i32, i32)

DEF_HELPER_4(msa_mulv_h, void, env, i32, i32, i32)

DEF_HELPER_4(msa_mulv_w, void, env, i32, i32, i32)

DEF_HELPER_4(msa_mulv_d, void, env, i32, i32, i32)



DEF_HELPER_4(msa_asub_s_b, void, env, i32, i32, i32)

DEF_HELPER_4(msa_asub_s_h, void, env, i32, i32, i32)

DEF_HELPER_4(msa_asub_s_w, void, env, i32, i32, i32)
@@ -968,6 +983,31 @@ DEF_HELPER_4(msa_hsub_u_h, void, env, i32, i32, i32) 
DEF_HELPER_4(msa_hsub_u_w, void, env, i32, i32, i32)

DEF_HELPER_4(msa_hsub_u_d, void, env, i32, i32, i32)



DEF_HELPER_4(msa_subs_s_b, void, env, i32, i32, i32)

DEF_HELPER_4(msa_subs_s_h, void, env, i32, i32, i32)

DEF_HELPER_4(msa_subs_s_w, void, env, i32, i32, i32)

DEF_HELPER_4(msa_subs_s_d, void, env, i32, i32, i32)



DEF_HELPER_4(msa_subs_u_b, void, env, i32, i32, i32)

DEF_HELPER_4(msa_subs_u_h, void, env, i32, i32, i32)

DEF_HELPER_4(msa_subs_u_w, void, env, i32, i32, i32)

DEF_HELPER_4(msa_subs_u_d, void, env, i32, i32, i32)



DEF_HELPER_4(msa_subsus_u_b, void, env, i32, i32, i32)

DEF_HELPER_4(msa_subsus_u_h, void, env, i32, i32, i32)

DEF_HELPER_4(msa_subsus_u_w, void, env, i32, i32, i32)

DEF_HELPER_4(msa_subsus_u_d, void, env, i32, i32, i32)



DEF_HELPER_4(msa_subsuu_s_b, void, env, i32, i32, i32)

DEF_HELPER_4(msa_subsuu_s_h, void, env, i32, i32, i32)

DEF_HELPER_4(msa_subsuu_s_w, void, env, i32, i32, i32)

DEF_HELPER_4(msa_subsuu_s_d, void, env, i32, i32, i32)



DEF_HELPER_4(msa_subv_b, void, env, i32, i32, i32)

DEF_HELPER_4(msa_subv_h, void, env, i32, i32, i32)

DEF_HELPER_4(msa_subv_w, void, env, i32, i32, i32)

DEF_HELPER_4(msa_subv_d, void, env, i32, i32, i32)



DEF_HELPER_4(msa_ilvev_b, void, env, i32, i32, i32)

DEF_HELPER_4(msa_ilvev_h, void, env, i32, i32, i32)

DEF_HELPER_4(msa_ilvev_w, void, env, i32, i32, i32)
@@ -1063,20 +1103,25 @@ DEF_HELPER_5(msa_srlri_df, void, env, i32, i32, i32, i32) 


DEF_HELPER_5(msa_binsl_df, void, env, i32, i32, i32, i32)

DEF_HELPER_5(msa_binsr_df, void, env, i32, i32, i32, i32)

DEF_HELPER_5(msa_subv_df, void, env, i32, i32, i32, i32)

DEF_HELPER_5(msa_subs_s_df, void, env, i32, i32, i32, i32)

DEF_HELPER_5(msa_subs_u_df, void, env, i32, i32, i32, i32)

DEF_HELPER_5(msa_subsus_u_df, void, env, i32, i32, i32, i32)

DEF_HELPER_5(msa_subsuu_s_df, void, env, i32, i32, i32, i32)

DEF_HELPER_5(msa_mulv_df, void, env, i32, i32, i32, i32)

DEF_HELPER_5(msa_maddv_df, void, env, i32, i32, i32, i32)

DEF_HELPER_5(msa_msubv_df, void, env, i32, i32, i32, i32)

DEF_HELPER_5(msa_dotp_s_df, void, env, i32, i32, i32, i32)

DEF_HELPER_5(msa_dotp_u_df, void, env, i32, i32, i32, i32)

DEF_HELPER_5(msa_dpadd_s_df, void, env, i32, i32, i32, i32)

DEF_HELPER_5(msa_dpadd_u_df, void, env, i32, i32, i32, i32)

DEF_HELPER_5(msa_dpsub_s_df, void, env, i32, i32, i32, i32)

DEF_HELPER_5(msa_dpsub_u_df, void, env, i32, i32, i32, i32)



DEF_HELPER_4(msa_dotp_s_h, void, env, i32, i32, i32)

DEF_HELPER_4(msa_dotp_s_w, void, env, i32, i32, i32)

DEF_HELPER_4(msa_dotp_s_d, void, env, i32, i32, i32)

DEF_HELPER_4(msa_dotp_u_h, void, env, i32, i32, i32)

DEF_HELPER_4(msa_dotp_u_w, void, env, i32, i32, i32)

DEF_HELPER_4(msa_dotp_u_d, void, env, i32, i32, i32)

DEF_HELPER_4(msa_dpadd_s_h, void, env, i32, i32, i32)

DEF_HELPER_4(msa_dpadd_s_w, void, env, i32, i32, i32)

DEF_HELPER_4(msa_dpadd_s_d, void, env, i32, i32, i32)

DEF_HELPER_4(msa_dpadd_u_h, void, env, i32, i32, i32)

DEF_HELPER_4(msa_dpadd_u_w, void, env, i32, i32, i32)

DEF_HELPER_4(msa_dpadd_u_d, void, env, i32, i32, i32)

DEF_HELPER_4(msa_dpsub_s_h, void, env, i32, i32, i32)

DEF_HELPER_4(msa_dpsub_s_w, void, env, i32, i32, i32)

DEF_HELPER_4(msa_dpsub_s_d, void, env, i32, i32, i32)

DEF_HELPER_4(msa_dpsub_u_h, void, env, i32, i32, i32)

DEF_HELPER_4(msa_dpsub_u_w, void, env, i32, i32, i32)

DEF_HELPER_4(msa_dpsub_u_d, void, env, i32, i32, i32)

DEF_HELPER_5(msa_sld_df, void, env, i32, i32, i32, i32)

DEF_HELPER_5(msa_splat_df, void, env, i32, i32, i32, i32)

DEF_HELPER_5(msa_vshf_df, void, env, i32, i32, i32, i32)

target/mips/mips-defs.h

+6 −2
Original line number Diff line number Diff line
@@ -57,9 +57,13 @@ 
/*

 *   bits 52-63: vendor-specific ASEs

 */

/* MultiMedia Instructions defined by R5900 */

#define ASE_MMI           0x0010000000000000ULL

/* MIPS eXtension/enhanced Unit defined by Ingenic */

#define ASE_MXU           0x0020000000000000ULL

/* Loongson MultiMedia Instructions */

#define ASE_LMMI          0x0040000000000000ULL

/* Loongson EXTensions */

#define ASE_LEXT          0x0080000000000000ULL



/* MIPS CPU defines. */
@@ -70,7 +74,7 @@ 
#define CPU_VR54XX      (CPU_MIPS4 | INSN_VR54XX)

#define CPU_R5900       (CPU_MIPS3 | INSN_R5900)

#define CPU_LOONGSON2E  (CPU_MIPS3 | INSN_LOONGSON2E)

#define CPU_LOONGSON2F  (CPU_MIPS3 | INSN_LOONGSON2F)

#define CPU_LOONGSON2F  (CPU_MIPS3 | INSN_LOONGSON2F | ASE_LMMI)



#define CPU_MIPS5       (CPU_MIPS4 | ISA_MIPS5)
@@ -97,7 +101,7 @@ 
/* Wave Computing: "nanoMIPS" */

#define CPU_NANOMIPS32  (CPU_MIPS32R6 | ISA_NANOMIPS32)



#define CPU_LOONGSON3A  (CPU_MIPS64R2 | INSN_LOONGSON3A)

#define CPU_LOONGSON3A  (CPU_MIPS64R2 | INSN_LOONGSON3A | ASE_LMMI | ASE_LEXT)



/*

 * Strictly follow the architecture standard:

target/mips/msa_helper.c

+1030 −266

File changed.

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