Commit f4e8428b authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180824-1' into staging 



target-arm queue:
 * Fix rounding errors in scaling float-to-int and int-to-float operations
 * Connect virtualization-related IRQs and memory regions of GICv2
   in boards that use Cortex-A7 or Cortex-A15
 * Support taking exceptions to AArch32 Hyp mode
 * Clear CPSR.IL and CPSR.J on 32-bit exception entry
   (a minor bug fix that won't affect non-buggy guest code)
 * mps2-an505: Implement various missing devices:
   dual timer, watchdogs, counters in the FPGAIO registers,
   some missing ID/control registers, TrustZone Master Security
   Controllers, PL081 DMA controllers, PL022 SPI controllers
 * correct ID register values for mps2-an385, -an511, -an505
 * fix some hardcoded tabs in untouched backwaters of the
   target/arm codebase
 * raspi: Refactor framebuffer property handling code and implement
   support for the virtual framebuffer/viewport

# gpg: Signature made Fri 24 Aug 2018 13:19:04 BST
# gpg:                using RSA key 3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>"
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20180824-1: (52 commits)
  hw/arm/mps2: Fix ID register errors on AN511 and AN385
  hw/display/bcm2835_fb: Validate bcm2835_fb_mbox_push() config
  hw/display/bcm2835_fb: Validate config settings
  hw/display/bcm2835_fb: Fix handling of virtual framebuffer
  hw/display/bcm2835_fb: Abstract out calculation of pitch, size
  hw/display/bcm2835_fb: Reset resolution, etc correctly
  hw/display/bcm2835_fb: Drop unused size and pitch fields
  hw/misc/bcm2835_property: Track fb settings using BCM2835FBConfig
  hw/misc/bcm2835_fb: Move config fields to their own struct
  target/arm: Remove a handful of stray tabs
  target/arm: Untabify iwmmxt_helper.c
  target/arm: Untabify translate.c
  hw/arm/mps2-tz: Fix MPS2 SCC config register values
  hw/arm/mps2-tz: Instantiate SPI controllers
  hw/ssi/pl022: Correct wrong DMACR and ICR handling
  hw/ssi/pl022: Correct wrong value for PL022_INT_RT
  hw/ssi/pl022: Use DeviceState::realize rather than SysBusDevice::init
  hw/ssi/pl022: Don't directly call vmstate_register()
  hw/ssi/pl022: Set up reset function in class init
  hw/ssi/pl022: Allow use as embedded-struct device
  ...

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 6b699ae1 239cb6fe

MAINTAINERS

+10 −0
Original line number Diff line number Diff line
@@ -451,10 +451,14 @@ F: hw/gpio/pl061.c 
F: hw/input/pl050.c

F: hw/intc/pl190.c

F: hw/sd/pl181.c

F: hw/ssi/pl022.c

F: include/hw/ssi/pl022.h

F: hw/timer/pl031.c

F: include/hw/arm/primecell.h

F: hw/timer/cmsdk-apb-timer.c

F: include/hw/timer/cmsdk-apb-timer.h

F: hw/timer/cmsdk-apb-dualtimer.c

F: include/hw/timer/cmsdk-apb-dualtimer.h

F: hw/char/cmsdk-apb-uart.c

F: include/hw/char/cmsdk-apb-uart.h

F: hw/watchdog/cmsdk-apb-watchdog.c
@@ -463,6 +467,8 @@ F: hw/misc/tz-ppc.c 
F: include/hw/misc/tz-ppc.h

F: hw/misc/tz-mpc.c

F: include/hw/misc/tz-mpc.h

F: hw/misc/tz-msc.c

F: include/hw/misc/tz-msc.h



ARM cores

M: Peter Maydell <peter.maydell@linaro.org>
@@ -537,6 +543,10 @@ F: hw/misc/mps2-*.c 
F: include/hw/misc/mps2-*.h

F: hw/arm/iotkit.c

F: include/hw/arm/iotkit.h

F: hw/misc/iotkit-sysctl.c

F: include/hw/misc/iotkit-sysctl.h

F: hw/misc/iotkit-sysinfo.c

F: include/hw/misc/iotkit-sysinfo.h



Musicpal

M: Jan Kiszka <jan.kiszka@web.de>

default-configs/arm-softmmu.mak

+4 −0
Original line number Diff line number Diff line
@@ -103,6 +103,7 @@ CONFIG_STM32F2XX_SPI=y 
CONFIG_STM32F205_SOC=y



CONFIG_CMSDK_APB_TIMER=y

CONFIG_CMSDK_APB_DUALTIMER=y

CONFIG_CMSDK_APB_UART=y

CONFIG_CMSDK_APB_WATCHDOG=y
@@ -110,9 +111,12 @@ CONFIG_MPS2_FPGAIO=y 
CONFIG_MPS2_SCC=y



CONFIG_TZ_MPC=y

CONFIG_TZ_MSC=y

CONFIG_TZ_PPC=y

CONFIG_IOTKIT=y

CONFIG_IOTKIT_SECCTL=y

CONFIG_IOTKIT_SYSCTL=y

CONFIG_IOTKIT_SYSINFO=y



CONFIG_VERSATILE=y

CONFIG_VERSATILE_PCI=y

fpu/softfloat.c

+452 −121

File changed.

Preview size limit exceeded, changes collapsed.

hw/arm/boot.c

+11 −0
Original line number Diff line number Diff line
@@ -736,6 +736,17 @@ static void do_cpu_reset(void *opaque) 
                }

            }



            if (!env->aarch64 && !info->secure_boot &&

                arm_feature(env, ARM_FEATURE_EL2)) {

                /*

                 * This is an AArch32 boot not to Secure state, and

                 * we have Hyp mode available, so boot the kernel into

                 * Hyp mode. This is not how the CPU comes out of reset,

                 * so we need to manually put it there.

                 */

                cpsr_write(env, ARM_CPU_MODE_HYP, CPSR_M, CPSRWriteRaw);

            }



            if (cs == first_cpu) {

                AddressSpace *as = arm_boot_address_space(cpu, info);

hw/arm/fsl-imx6ul.c

+4 −0
Original line number Diff line number Diff line
@@ -207,6 +207,10 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) 
        irq = qdev_get_gpio_in(d, ARM_CPU_IRQ);

        sysbus_connect_irq(sbd, i, irq);

        sysbus_connect_irq(sbd, i + smp_cpus, qdev_get_gpio_in(d, ARM_CPU_FIQ));

        sysbus_connect_irq(sbd, i + 2 * smp_cpus,

                           qdev_get_gpio_in(d, ARM_CPU_VIRQ));

        sysbus_connect_irq(sbd, i + 3 * smp_cpus,

                           qdev_get_gpio_in(d, ARM_CPU_VFIQ));

    }



    /*