Commit f46934df authored by Richard Henderson's avatar Richard Henderson
Browse files

tcg: Remove tcg_regset_set32 



It's not even clear what the interface REG and VAL32 were supposed to mean.
All uses had REG = 0 and VAL32 was the bitset assigned to the destination.

Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
parent 07ddf036

tcg/aarch64/tcg-target.inc.c

+17 −16
Original line number Diff line number Diff line
@@ -121,11 +121,11 @@ static const char *target_parse_constraint(TCGArgConstraint *ct, 
    switch (*ct_str++) {

    case 'r':

        ct->ct |= TCG_CT_REG;

        tcg_regset_set32(ct->u.regs, 0, (1ULL << TCG_TARGET_NB_REGS) - 1);

        ct->u.regs = 0xffffffffu;

        break;

    case 'l': /* qemu_ld / qemu_st address, data_reg */

        ct->ct |= TCG_CT_REG;

        tcg_regset_set32(ct->u.regs, 0, (1ULL << TCG_TARGET_NB_REGS) - 1);

        ct->u.regs = 0xffffffffu;

#ifdef CONFIG_SOFTMMU

        /* x0 and x1 will be overwritten when reading the tlb entry,

           and x2, and x3 for helper args, better to avoid using them. */
@@ -1925,20 +1925,21 @@ static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op) 


static void tcg_target_init(TCGContext *s)

{

    tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);

    tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffffffff);



    tcg_regset_set32(tcg_target_call_clobber_regs, 0,

                     (1 << TCG_REG_X0) | (1 << TCG_REG_X1) |

                     (1 << TCG_REG_X2) | (1 << TCG_REG_X3) |

                     (1 << TCG_REG_X4) | (1 << TCG_REG_X5) |

                     (1 << TCG_REG_X6) | (1 << TCG_REG_X7) |

                     (1 << TCG_REG_X8) | (1 << TCG_REG_X9) |

                     (1 << TCG_REG_X10) | (1 << TCG_REG_X11) |

                     (1 << TCG_REG_X12) | (1 << TCG_REG_X13) |

                     (1 << TCG_REG_X14) | (1 << TCG_REG_X15) |

                     (1 << TCG_REG_X16) | (1 << TCG_REG_X17) |

                     (1 << TCG_REG_X18) | (1 << TCG_REG_X30));

    tcg_target_available_regs[TCG_TYPE_I32] = 0xffffffffu;

    tcg_target_available_regs[TCG_TYPE_I64] = 0xffffffffu;



    tcg_target_call_clobber_regs = 0xfffffffu;

    tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_X19);

    tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_X20);

    tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_X21);

    tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_X22);

    tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_X23);

    tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_X24);

    tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_X25);

    tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_X26);

    tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_X27);

    tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_X28);

    tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_X29);



    s->reserved_regs = 0;

    tcg_regset_set_reg(s->reserved_regs, TCG_REG_SP);

tcg/arm/tcg-target.inc.c

+12 −11
Original line number Diff line number Diff line
@@ -264,13 +264,13 @@ static const char *target_parse_constraint(TCGArgConstraint *ct, 


    case 'r':

        ct->ct |= TCG_CT_REG;

        tcg_regset_set32(ct->u.regs, 0, (1 << TCG_TARGET_NB_REGS) - 1);

        ct->u.regs = 0xffff;

        break;



    /* qemu_ld address */

    case 'l':

        ct->ct |= TCG_CT_REG;

        tcg_regset_set32(ct->u.regs, 0, (1 << TCG_TARGET_NB_REGS) - 1);

        ct->u.regs = 0xffff;

#ifdef CONFIG_SOFTMMU

        /* r0-r2,lr will be overwritten when reading the tlb entry,

           so don't use these. */
@@ -284,7 +284,7 @@ static const char *target_parse_constraint(TCGArgConstraint *ct, 
    /* qemu_st address & data */

    case 's':

        ct->ct |= TCG_CT_REG;

        tcg_regset_set32(ct->u.regs, 0, (1 << TCG_TARGET_NB_REGS) - 1);

        ct->u.regs = 0xffff;

        /* r0-r2 will be overwritten when reading the tlb entry (softmmu only)

           and r0-r1 doing the byte swapping, so don't use these. */

        tcg_regset_reset_reg(ct->u.regs, TCG_REG_R0);
@@ -2164,14 +2164,15 @@ static void tcg_target_init(TCGContext *s) 
        }

    }



    tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffff);

    tcg_regset_set32(tcg_target_call_clobber_regs, 0,

                     (1 << TCG_REG_R0) |

                     (1 << TCG_REG_R1) |

                     (1 << TCG_REG_R2) |

                     (1 << TCG_REG_R3) |

                     (1 << TCG_REG_R12) |

                     (1 << TCG_REG_R14));

    tcg_target_available_regs[TCG_TYPE_I32] = 0xffff;



    tcg_target_call_clobber_regs = 0;

    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R0);

    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R1);

    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R2);

    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R3);

    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R12);

    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R14);



    s->reserved_regs = 0;

    tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);

tcg/i386/tcg-target.inc.c

+7 −19
Original line number Diff line number Diff line
@@ -193,23 +193,15 @@ static const char *target_parse_constraint(TCGArgConstraint *ct, 
        break;

    case 'q':

        ct->ct |= TCG_CT_REG;

        if (TCG_TARGET_REG_BITS == 64) {

            tcg_regset_set32(ct->u.regs, 0, 0xffff);

        } else {

            tcg_regset_set32(ct->u.regs, 0, 0xf);

        }

        ct->u.regs = TCG_TARGET_REG_BITS == 64 ? 0xffff : 0xf;

        break;

    case 'Q':

        ct->ct |= TCG_CT_REG;

        tcg_regset_set32(ct->u.regs, 0, 0xf);

        ct->u.regs = 0xf;

        break;

    case 'r':

        ct->ct |= TCG_CT_REG;

        if (TCG_TARGET_REG_BITS == 64) {

            tcg_regset_set32(ct->u.regs, 0, 0xffff);

        } else {

            tcg_regset_set32(ct->u.regs, 0, 0xff);

        }

        ct->u.regs = TCG_TARGET_REG_BITS == 64 ? 0xffff : 0xff;

        break;

    case 'W':

        /* With TZCNT/LZCNT, we can have operand-size as an input.  */
@@ -219,11 +211,7 @@ static const char *target_parse_constraint(TCGArgConstraint *ct, 
        /* qemu_ld/st address constraint */

    case 'L':

        ct->ct |= TCG_CT_REG;

        if (TCG_TARGET_REG_BITS == 64) {

            tcg_regset_set32(ct->u.regs, 0, 0xffff);

        } else {

            tcg_regset_set32(ct->u.regs, 0, 0xff);

        }

        ct->u.regs = TCG_TARGET_REG_BITS == 64 ? 0xffff : 0xff;

        tcg_regset_reset_reg(ct->u.regs, TCG_REG_L0);

        tcg_regset_reset_reg(ct->u.regs, TCG_REG_L1);

        break;
@@ -2643,10 +2631,10 @@ static void tcg_target_init(TCGContext *s) 
#endif /* CONFIG_CPUID_H */



    if (TCG_TARGET_REG_BITS == 64) {

        tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffff);

        tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffff);

        tcg_target_available_regs[TCG_TYPE_I32] = 0xffff;

        tcg_target_available_regs[TCG_TYPE_I64] = 0xffff;

    } else {

        tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xff);

        tcg_target_available_regs[TCG_TYPE_I32] = 0xff;

    }



    tcg_target_call_clobber_regs = 0;

tcg/ppc/tcg-target.inc.c

+19 −18
Original line number Diff line number Diff line
@@ -260,11 +260,11 @@ static const char *target_parse_constraint(TCGArgConstraint *ct, 
        break;

    case 'r':

        ct->ct |= TCG_CT_REG;

        tcg_regset_set32(ct->u.regs, 0, 0xffffffff);

        ct->u.regs = 0xffffffff;

        break;

    case 'L':                   /* qemu_ld constraint */

        ct->ct |= TCG_CT_REG;

        tcg_regset_set32(ct->u.regs, 0, 0xffffffff);

        ct->u.regs = 0xffffffff;

        tcg_regset_reset_reg(ct->u.regs, TCG_REG_R3);

#ifdef CONFIG_SOFTMMU

        tcg_regset_reset_reg(ct->u.regs, TCG_REG_R4);
@@ -273,7 +273,7 @@ static const char *target_parse_constraint(TCGArgConstraint *ct, 
        break;

    case 'S':                   /* qemu_st constraint */

        ct->ct |= TCG_CT_REG;

        tcg_regset_set32(ct->u.regs, 0, 0xffffffff);

        ct->u.regs = 0xffffffff;

        tcg_regset_reset_reg(ct->u.regs, TCG_REG_R3);

#ifdef CONFIG_SOFTMMU

        tcg_regset_reset_reg(ct->u.regs, TCG_REG_R4);
@@ -2772,21 +2772,22 @@ static void tcg_target_init(TCGContext *s) 
    }

#endif



    tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);

    tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffffffff);

    tcg_regset_set32(tcg_target_call_clobber_regs, 0,

                     (1 << TCG_REG_R0) |

                     (1 << TCG_REG_R2) |

                     (1 << TCG_REG_R3) |

                     (1 << TCG_REG_R4) |

                     (1 << TCG_REG_R5) |

                     (1 << TCG_REG_R6) |

                     (1 << TCG_REG_R7) |

                     (1 << TCG_REG_R8) |

                     (1 << TCG_REG_R9) |

                     (1 << TCG_REG_R10) |

                     (1 << TCG_REG_R11) |

                     (1 << TCG_REG_R12));

    tcg_target_available_regs[TCG_TYPE_I32] = 0xffffffff;

    tcg_target_available_regs[TCG_TYPE_I64] = 0xffffffff;



    tcg_target_call_clobber_regs = 0;

    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R0);

    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R2);

    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R3);

    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R4);

    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R5);

    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R6);

    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R7);

    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R8);

    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R9);

    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R10);

    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R11);

    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R12);



    s->reserved_regs = 0;

    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R0); /* tcg temp */

tcg/s390/tcg-target.inc.c

+7 −7
Original line number Diff line number Diff line
@@ -402,11 +402,11 @@ static const char *target_parse_constraint(TCGArgConstraint *ct, 
    switch (*ct_str++) {

    case 'r':                  /* all registers */

        ct->ct |= TCG_CT_REG;

        tcg_regset_set32(ct->u.regs, 0, 0xffff);

        ct->u.regs = 0xffff;

        break;

    case 'L':                  /* qemu_ld/st constraint */

        ct->ct |= TCG_CT_REG;

        tcg_regset_set32(ct->u.regs, 0, 0xffff);

        ct->u.regs = 0xffff;

        tcg_regset_reset_reg(ct->u.regs, TCG_REG_R2);

        tcg_regset_reset_reg(ct->u.regs, TCG_REG_R3);

        tcg_regset_reset_reg(ct->u.regs, TCG_REG_R4);
@@ -2519,8 +2519,8 @@ static void tcg_target_init(TCGContext *s) 
{

    query_s390_facilities();



    tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffff);

    tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffff);

    tcg_target_available_regs[TCG_TYPE_I32] = 0xffff;

    tcg_target_available_regs[TCG_TYPE_I64] = 0xffff;



    tcg_target_call_clobber_regs = 0;

    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R0);