Commit f37e2a6b authored by Stefan Weil's avatar Stefan Weil Committed by Blue Swirl
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target-sparc: Fix order of function parameters 



The MinGW-w64 gcc complains about wrong parameters for
gen_helper_fpadd16_s and three other functions.

gen_helper_fpadd16_s is declared like this (hidden in lots of macros):

static inline void
 gen_helper_fpadd16s(TCGv_i32 retval, TCGv_ptr arg1,
                     TCGv_i32 arg2, TCGv_i32 arg3);

So it looks like cpu_env should be the 2nd parameter.

Please review this patch as I have no environment to test it
(maybe the 1st parameter should be cpu_dst?).

Cc: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: default avatarStefan Weil <sw@weilnetz.de>
Signed-off-by: default avatarBlue Swirl <blauwirbel@gmail.com>
parent ba43d289

target-sparc/translate.c

+4 −4
Original line number Diff line number Diff line
@@ -4017,7 +4017,7 @@ static void disas_sparc_insn(DisasContext * dc) 
                    break;

                case 0x051: /* VIS I fpadd16s */

                    CHECK_FPU_FEATURE(dc, VIS1);

                    gen_helper_fpadd16s(cpu_env, cpu_fpr[rd],

                    gen_helper_fpadd16s(cpu_fpr[rd], cpu_env,

                                        cpu_fpr[rs1], cpu_fpr[rs2]);

                    gen_update_fprs_dirty(rd);

                    break;
@@ -4031,7 +4031,7 @@ static void disas_sparc_insn(DisasContext * dc) 
                    break;

                case 0x053: /* VIS I fpadd32s */

                    CHECK_FPU_FEATURE(dc, VIS1);

                    gen_helper_fpadd32s(cpu_env, cpu_fpr[rd],

                    gen_helper_fpadd32s(cpu_fpr[rd], cpu_env,

                                        cpu_fpr[rs1], cpu_fpr[rs2]);

                    gen_update_fprs_dirty(rd);

                    break;
@@ -4045,7 +4045,7 @@ static void disas_sparc_insn(DisasContext * dc) 
                    break;

                case 0x055: /* VIS I fpsub16s */

                    CHECK_FPU_FEATURE(dc, VIS1);

                    gen_helper_fpsub16s(cpu_env, cpu_fpr[rd],

                    gen_helper_fpsub16s(cpu_fpr[rd], cpu_env,

                                        cpu_fpr[rs1], cpu_fpr[rs2]);

                    gen_update_fprs_dirty(rd);

                    break;
@@ -4059,7 +4059,7 @@ static void disas_sparc_insn(DisasContext * dc) 
                    break;

                case 0x057: /* VIS I fpsub32s */

                    CHECK_FPU_FEATURE(dc, VIS1);

                    gen_helper_fpsub32s(cpu_env, cpu_fpr[rd],

                    gen_helper_fpsub32s(cpu_fpr[rd], cpu_env,

                                        cpu_fpr[rs1], cpu_fpr[rs2]);

                    gen_update_fprs_dirty(rd);

                    break;