Loading hw/misc/mips_itu.c +3 −8 Original line number Diff line number Diff line Loading @@ -66,18 +66,13 @@ static uint64_t itc_tag_read(void *opaque, hwaddr addr, unsigned size) { MIPSITUState *tag = (MIPSITUState *)opaque; uint64_t index = addr >> 3; uint64_t ret = 0; switch (index) { case 0 ... ITC_ADDRESSMAP_NUM: ret = tag->ITCAddressMap[index]; break; default: if (index >= ITC_ADDRESSMAP_NUM) { qemu_log_mask(LOG_GUEST_ERROR, "Read 0x%" PRIx64 "\n", addr); break; return 0; } return ret; return tag->ITCAddressMap[index]; } static void itc_reconfigure(MIPSITUState *tag) Loading Loading
hw/misc/mips_itu.c +3 −8 Original line number Diff line number Diff line Loading @@ -66,18 +66,13 @@ static uint64_t itc_tag_read(void *opaque, hwaddr addr, unsigned size) { MIPSITUState *tag = (MIPSITUState *)opaque; uint64_t index = addr >> 3; uint64_t ret = 0; switch (index) { case 0 ... ITC_ADDRESSMAP_NUM: ret = tag->ITCAddressMap[index]; break; default: if (index >= ITC_ADDRESSMAP_NUM) { qemu_log_mask(LOG_GUEST_ERROR, "Read 0x%" PRIx64 "\n", addr); break; return 0; } return ret; return tag->ITCAddressMap[index]; } static void itc_reconfigure(MIPSITUState *tag) Loading