Commit f2a53c9e authored by Andrey Smetanin's avatar Andrey Smetanin Committed by Paolo Bonzini
Browse files

i386/kvm: Hyper-v crash msrs set/get'ers and migration 



KVM Hyper-V based guests can notify hypervisor about
occurred guest crash by writing into Hyper-V crash MSR's.
This patch does handling and migration of HV_X64_MSR_CRASH_P0-P4,
HV_X64_MSR_CRASH_CTL msrs. User can enable these MSR's by
'hv-crash' option.

Signed-off-by: default avatarAndrey Smetanin <asmetanin@virtuozzo.com>
Signed-off-by: default avatarDenis V. Lunev <den@openvz.org>
CC: Paolo Bonzini <pbonzini@redhat.com>
CC: Andreas Färber <afaerber@suse.de>
Message-Id: <1435924905-8926-13-git-send-email-den@openvz.org>
[Folks, stop abrviating variable names!!! Also fix compilation on
 non-Linux/x86. - Paolo]
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 7c207b90

target-i386/cpu-qom.h

+1 −0
Original line number Diff line number Diff line
@@ -89,6 +89,7 @@ typedef struct X86CPU { 
    bool hyperv_relaxed_timing;

    int hyperv_spinlock_attempts;

    bool hyperv_time;

    bool hyperv_crash;

    bool check_cpuid;

    bool enforce_cpuid;

    bool expose_kvm;

target-i386/cpu.c

+1 −0
Original line number Diff line number Diff line
@@ -3121,6 +3121,7 @@ static Property x86_cpu_properties[] = { 
    DEFINE_PROP_BOOL("hv-relaxed", X86CPU, hyperv_relaxed_timing, false),

    DEFINE_PROP_BOOL("hv-vapic", X86CPU, hyperv_vapic, false),

    DEFINE_PROP_BOOL("hv-time", X86CPU, hyperv_time, false),

    DEFINE_PROP_BOOL("hv-crash", X86CPU, hyperv_crash, false),

    DEFINE_PROP_BOOL("check", X86CPU, check_cpuid, false),

    DEFINE_PROP_BOOL("enforce", X86CPU, enforce_cpuid, false),

    DEFINE_PROP_BOOL("kvm", X86CPU, expose_kvm, true),

target-i386/cpu.h

+2 −0
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@ 


#include "config.h"

#include "qemu-common.h"

#include "standard-headers/asm-x86/hyperv.h"



#ifdef TARGET_X86_64

#define TARGET_LONG_BITS 64
@@ -908,6 +909,7 @@ typedef struct CPUX86State { 
    uint64_t msr_hv_guest_os_id;

    uint64_t msr_hv_vapic;

    uint64_t msr_hv_tsc;

    uint64_t msr_hv_crash_params[HV_X64_MSR_CRASH_PARAMS];



    /* exception/interrupt handling */

    int error_code;

target-i386/kvm.c

+31 −1
Original line number Diff line number Diff line
@@ -80,6 +80,7 @@ static int lm_capable_kernel; 
static bool has_msr_hv_hypercall;

static bool has_msr_hv_vapic;

static bool has_msr_hv_tsc;

static bool has_msr_hv_crash;

static bool has_msr_mtrr;

static bool has_msr_xss;
@@ -457,7 +458,8 @@ static bool hyperv_enabled(X86CPU *cpu) 
    return kvm_check_extension(cs->kvm_state, KVM_CAP_HYPERV) > 0 &&

           (hyperv_hypercall_available(cpu) ||

            cpu->hyperv_time  ||

            cpu->hyperv_relaxed_timing);

            cpu->hyperv_relaxed_timing ||

            cpu->hyperv_crash);

}



static Error *invtsc_mig_blocker;
@@ -523,6 +525,10 @@ int kvm_arch_init_vcpu(CPUState *cs) 
            c->eax |= 0x200;

            has_msr_hv_tsc = true;

        }

        if (cpu->hyperv_crash && has_msr_hv_crash) {

            c->edx |= HV_X64_GUEST_CRASH_MSR_AVAILABLE;

        }



        c = &cpuid_data.entries[cpuid_i++];

        c->function = HYPERV_CPUID_ENLIGHTMENT_INFO;

        if (cpu->hyperv_relaxed_timing) {
@@ -843,6 +849,10 @@ static int kvm_get_supported_msrs(KVMState *s) 
                    has_msr_xss = true;

                    continue;

                }

                if (kvm_msr_list->indices[i] == HV_X64_MSR_CRASH_CTL) {

                    has_msr_hv_crash = true;

                    continue;

                }

            }

        }
@@ -1375,6 +1385,16 @@ static int kvm_put_msrs(X86CPU *cpu, int level) 
            kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_REFERENCE_TSC,

                              env->msr_hv_tsc);

        }

        if (has_msr_hv_crash) {

            int j;



            for (j = 0; j < HV_X64_MSR_CRASH_PARAMS; j++)

                kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_CRASH_P0 + j,

                                  env->msr_hv_crash_params[j]);



            kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_CRASH_CTL,

                              HV_X64_MSR_CRASH_CTL_NOTIFY);

        }

        if (has_msr_mtrr) {

            kvm_msr_entry_set(&msrs[n++], MSR_MTRRdefType, env->mtrr_deftype);

            kvm_msr_entry_set(&msrs[n++],
@@ -1730,6 +1750,13 @@ static int kvm_get_msrs(X86CPU *cpu) 
    if (has_msr_hv_tsc) {

        msrs[n++].index = HV_X64_MSR_REFERENCE_TSC;

    }

    if (has_msr_hv_crash) {

        int j;



        for (j = 0; j < HV_X64_MSR_CRASH_PARAMS; j++) {

            msrs[n++].index = HV_X64_MSR_CRASH_P0 + j;

        }

    }

    if (has_msr_mtrr) {

        msrs[n++].index = MSR_MTRRdefType;

        msrs[n++].index = MSR_MTRRfix64K_00000;
@@ -1877,6 +1904,9 @@ static int kvm_get_msrs(X86CPU *cpu) 
        case HV_X64_MSR_REFERENCE_TSC:

            env->msr_hv_tsc = msrs[i].data;

            break;

        case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:

            env->msr_hv_crash_params[index - HV_X64_MSR_CRASH_P0] = msrs[i].data;

            break;

        case MSR_MTRRdefType:

            env->mtrr_deftype = msrs[i].data;

            break;

target-i386/machine.c

+27 −0
Original line number Diff line number Diff line
@@ -661,6 +661,32 @@ static const VMStateDescription vmstate_msr_hyperv_time = { 
    }

};



static bool hyperv_crash_enable_needed(void *opaque)

{

    X86CPU *cpu = opaque;

    CPUX86State *env = &cpu->env;

    int i;



    for (i = 0; i < HV_X64_MSR_CRASH_PARAMS; i++) {

        if (env->msr_hv_crash_params[i]) {

            return true;

        }

    }

    return false;

}



static const VMStateDescription vmstate_msr_hyperv_crash = {

    .name = "cpu/msr_hyperv_crash",

    .version_id = 1,

    .minimum_version_id = 1,

    .needed = hyperv_crash_enable_needed,

    .fields = (VMStateField[]) {

        VMSTATE_UINT64_ARRAY(env.msr_hv_crash_params,

                             X86CPU, HV_X64_MSR_CRASH_PARAMS),

        VMSTATE_END_OF_LIST()

    }

};



static bool avx512_needed(void *opaque)

{

    X86CPU *cpu = opaque;
@@ -842,6 +868,7 @@ VMStateDescription vmstate_x86_cpu = { 
        &vmstate_msr_hypercall_hypercall,

        &vmstate_msr_hyperv_vapic,

        &vmstate_msr_hyperv_time,

        &vmstate_msr_hyperv_crash,

        &vmstate_avx512,

        &vmstate_xss,

        NULL