Commit f1d59486 authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-next-20200714' into staging 

MIPS patches for 5.1

- A pair of fixes,
- Add Huacai Chen as MIPS KVM maintainer,
- Add Jiaxun Yang as designated MIPS TCG reviewer.

CI jobs results:
. https://travis-ci.org/github/philmd/qemu/builds/708079271
. https://gitlab.com/philmd/qemu/-/pipelines/166528104
. https://cirrus-ci.com/build/6483996878045184



# gpg: Signature made Tue 14 Jul 2020 20:59:58 BST
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* remotes/philmd-gitlab/tags/mips-next-20200714:
  MAINTAINERS: Adjust MIPS maintainership (add Huacai Chen & Jiaxun Yang)
  target/mips: Fix ADD.S FPU instruction
  target/mips: Remove identical if/else branches

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 67320537 15d983de

MAINTAINERS

+4 −0
Original line number Diff line number Diff line
@@ -222,6 +222,7 @@ F: disas/microblaze.c 
MIPS TCG CPUs

M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>

R: Aurelien Jarno <aurelien@aurel32.net>

R: Jiaxun Yang <jiaxun.yang@flygoat.com>

R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>

S: Maintained

F: target/mips/
@@ -384,6 +385,7 @@ S: Maintained 
F: target/arm/kvm.c



MIPS KVM CPUs

M: Huacai Chen <chenhc@lemote.com>

M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>

S: Odd Fixes

F: target/mips/kvm.c
@@ -2751,6 +2753,8 @@ F: disas/i386.c 
MIPS TCG target

M: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>

R: Aurelien Jarno <aurelien@aurel32.net>

R: Huacai Chen <chenhc@lemote.com>

R: Jiaxun Yang <jiaxun.yang@flygoat.com>

R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>

S: Maintained

F: tcg/mips/

target/mips/cp0_helper.c

+1 −8
Original line number Diff line number Diff line
@@ -375,16 +375,9 @@ target_ulong helper_mftc0_entryhi(CPUMIPSState *env) 
target_ulong helper_mftc0_cause(CPUMIPSState *env)

{

    int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);

    int32_t tccause;

    CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc);



    if (other_tc == other->current_tc) {

        tccause = other->CP0_Cause;

    } else {

        tccause = other->CP0_Cause;

    }



    return tccause;

    return other->CP0_Cause;

}



target_ulong helper_mftc0_status(CPUMIPSState *env)

target/mips/fpu_helper.c

+1 −1
Original line number Diff line number Diff line
@@ -1221,7 +1221,7 @@ uint32_t helper_float_add_s(CPUMIPSState *env, 
{

    uint32_t wt2;



    wt2 = float32_sub(fst0, fst1, &env->active_fpu.fp_status);

    wt2 = float32_add(fst0, fst1, &env->active_fpu.fp_status);

    update_fcr31(env, GETPC());

    return wt2;

}