Commit f1132835 authored by Nikunj A Dadhania's avatar Nikunj A Dadhania Committed by David Gibson
Browse files

target-ppc: add xxspltib instruction 



xxspltib: VSX Vector Splat Immediate Byte

Copy the immediate byte in each byte of target VSR

Signed-off-by: default avatarNikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
parent 2391b357

target-ppc/translate.c

+2 −0
Original line number Diff line number Diff line
@@ -591,6 +591,8 @@ EXTRACT_HELPER(DM, 8, 2); 
EXTRACT_HELPER(UIM, 16, 2);

EXTRACT_HELPER(SHW, 8, 2);

EXTRACT_HELPER(SP, 19, 2);

EXTRACT_HELPER(IMM8, 11, 8);



/*****************************************************************************/

/* PowerPC instructions table                                                */

target-ppc/translate/vsx-impl.inc.c

+20 −0
Original line number Diff line number Diff line
@@ -647,6 +647,26 @@ static void gen_xxspltw(DisasContext *ctx) 
    tcg_temp_free_i64(b2);

}



#define pattern(x) (((x) & 0xff) * (~(uint64_t)0 / 0xff))



static void gen_xxspltib(DisasContext *ctx)

{

    unsigned char uim8 = IMM8(ctx->opcode);

    if (xS(ctx->opcode) < 32) {

        if (unlikely(!ctx->altivec_enabled)) {

            gen_exception(ctx, POWERPC_EXCP_VPU);

            return;

        }

    } else {

        if (unlikely(!ctx->vsx_enabled)) {

            gen_exception(ctx, POWERPC_EXCP_VSXU);

            return;

        }

    }

    tcg_gen_movi_i64(cpu_vsrh(xT(ctx->opcode)), pattern(uim8));

    tcg_gen_movi_i64(cpu_vsrl(xT(ctx->opcode)), pattern(uim8));

}



static void gen_xxsldwi(DisasContext *ctx)

{

    TCGv_i64 xth, xtl;

target-ppc/translate/vsx-ops.inc.c

+5 −0
Original line number Diff line number Diff line
@@ -20,6 +20,10 @@ GEN_HANDLER_E(mfvsrd, 0x1F, 0x13, 0x01, 0x0000F800, PPC_NONE, PPC2_VSX207), 
GEN_HANDLER_E(mtvsrd, 0x1F, 0x13, 0x05, 0x0000F800, PPC_NONE, PPC2_VSX207),

#endif



#define GEN_XX1FORM(name, opc2, opc3, fl2)                              \

GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 0, opc3, 0, PPC_NONE, fl2), \

GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 1, opc3, 0, PPC_NONE, fl2)



#define GEN_XX2FORM(name, opc2, opc3, fl2)                           \

GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 0, opc3, 0, PPC_NONE, fl2), \

GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 1, opc3, 0, PPC_NONE, fl2)
@@ -222,6 +226,7 @@ VSX_LOGICAL(xxlorc, 0x8, 0x15, PPC2_VSX207), 
GEN_XX3FORM(xxmrghw, 0x08, 0x02, PPC2_VSX),

GEN_XX3FORM(xxmrglw, 0x08, 0x06, PPC2_VSX),

GEN_XX2FORM(xxspltw, 0x08, 0x0A, PPC2_VSX),

GEN_XX1FORM(xxspltib, 0x08, 0x0B, PPC2_ISA300),

GEN_XX3FORM_DM(xxsldwi, 0x08, 0x00),



#define GEN_XXSEL_ROW(opc3) \