Loading target-ppc/helper.h +2 −0 Original line number Diff line number Diff line Loading @@ -170,4 +170,6 @@ DEF_HELPER_1(load_74xx_tlbi, void, tl) DEF_HELPER_1(602_mfrom, tl, tl) #endif DEF_HELPER_3(dlmzb, tl, tl, tl, i32) #include "def-helper.h" target-ppc/op.c +0 −17 Original line number Diff line number Diff line Loading @@ -706,23 +706,6 @@ void OPPROTO op_4xx_tlbwe_hi (void) /* SPR micro-ops */ /* 440 specific */ void OPPROTO op_440_dlmzb (void) { do_440_dlmzb(); RETURN(); } void OPPROTO op_440_dlmzb_update_Rc (void) { if (T0 == 8) T0 = 0x2; else if (T0 < 4) T0 = 0x4; else T0 = 0x8; RETURN(); } #if !defined(CONFIG_USER_ONLY) void OPPROTO op_store_pir (void) { Loading target-ppc/op_helper.c +20 −5 Original line number Diff line number Diff line Loading @@ -1999,24 +1999,39 @@ void do_store_403_pb (int num) #endif /* 440 specific */ void do_440_dlmzb (void) target_ulong helper_dlmzb (target_ulong high, target_ulong low, uint32_t update_Rc) { target_ulong mask; int i; i = 1; for (mask = 0xFF000000; mask != 0; mask = mask >> 8) { if ((T0 & mask) == 0) if ((high & mask) == 0) { if (update_Rc) { env->crf[0] = 0x4; } goto done; } i++; } for (mask = 0xFF000000; mask != 0; mask = mask >> 8) { if ((T1 & mask) == 0) break; if ((low & mask) == 0) { if (update_Rc) { env->crf[0] = 0x8; } goto done; } i++; } if (update_Rc) { env->crf[0] = 0x2; } done: T0 = i; env->xer = (env->xer & ~0x7F) | i; if (update_Rc) { env->crf[0] |= xer_so; } return i; } /*****************************************************************************/ Loading target-ppc/op_helper.h +0 −3 Original line number Diff line number Diff line Loading @@ -63,9 +63,6 @@ void do_4xx_tlbwe_lo (void); void do_4xx_tlbwe_hi (void); #endif /* PowerPC 440 specific helpers */ void do_440_dlmzb (void); /* PowerPC 403 specific helpers */ #if !defined(CONFIG_USER_ONLY) void do_load_403_pb (int num); Loading target-ppc/translate.c +4 −11 Original line number Diff line number Diff line Loading @@ -5747,17 +5747,10 @@ GEN_HANDLER(wrteei, 0x1F, 0x03, 0x05, 0x000EFC01, PPC_WRTEE) /* dlmzb */ GEN_HANDLER(dlmzb, 0x1F, 0x0E, 0x02, 0x00000000, PPC_440_SPEC) { tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]); tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]); gen_op_440_dlmzb(); tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]); tcg_gen_andi_tl(cpu_xer, cpu_xer, ~0x7F); tcg_gen_or_tl(cpu_xer, cpu_xer, cpu_T[0]); if (Rc(ctx->opcode)) { gen_op_440_dlmzb_update_Rc(); tcg_gen_trunc_tl_i32(cpu_crf[0], cpu_T[0]); tcg_gen_andi_i32(cpu_crf[0], cpu_crf[0], 0xf); } TCGv_i32 t0 = tcg_const_i32(Rc(ctx->opcode)); gen_helper_dlmzb(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], t0); tcg_temp_free_i32(t0); } /* mbar replaces eieio on 440 */ Loading Loading
target-ppc/helper.h +2 −0 Original line number Diff line number Diff line Loading @@ -170,4 +170,6 @@ DEF_HELPER_1(load_74xx_tlbi, void, tl) DEF_HELPER_1(602_mfrom, tl, tl) #endif DEF_HELPER_3(dlmzb, tl, tl, tl, i32) #include "def-helper.h"
target-ppc/op.c +0 −17 Original line number Diff line number Diff line Loading @@ -706,23 +706,6 @@ void OPPROTO op_4xx_tlbwe_hi (void) /* SPR micro-ops */ /* 440 specific */ void OPPROTO op_440_dlmzb (void) { do_440_dlmzb(); RETURN(); } void OPPROTO op_440_dlmzb_update_Rc (void) { if (T0 == 8) T0 = 0x2; else if (T0 < 4) T0 = 0x4; else T0 = 0x8; RETURN(); } #if !defined(CONFIG_USER_ONLY) void OPPROTO op_store_pir (void) { Loading
target-ppc/op_helper.c +20 −5 Original line number Diff line number Diff line Loading @@ -1999,24 +1999,39 @@ void do_store_403_pb (int num) #endif /* 440 specific */ void do_440_dlmzb (void) target_ulong helper_dlmzb (target_ulong high, target_ulong low, uint32_t update_Rc) { target_ulong mask; int i; i = 1; for (mask = 0xFF000000; mask != 0; mask = mask >> 8) { if ((T0 & mask) == 0) if ((high & mask) == 0) { if (update_Rc) { env->crf[0] = 0x4; } goto done; } i++; } for (mask = 0xFF000000; mask != 0; mask = mask >> 8) { if ((T1 & mask) == 0) break; if ((low & mask) == 0) { if (update_Rc) { env->crf[0] = 0x8; } goto done; } i++; } if (update_Rc) { env->crf[0] = 0x2; } done: T0 = i; env->xer = (env->xer & ~0x7F) | i; if (update_Rc) { env->crf[0] |= xer_so; } return i; } /*****************************************************************************/ Loading
target-ppc/op_helper.h +0 −3 Original line number Diff line number Diff line Loading @@ -63,9 +63,6 @@ void do_4xx_tlbwe_lo (void); void do_4xx_tlbwe_hi (void); #endif /* PowerPC 440 specific helpers */ void do_440_dlmzb (void); /* PowerPC 403 specific helpers */ #if !defined(CONFIG_USER_ONLY) void do_load_403_pb (int num); Loading
target-ppc/translate.c +4 −11 Original line number Diff line number Diff line Loading @@ -5747,17 +5747,10 @@ GEN_HANDLER(wrteei, 0x1F, 0x03, 0x05, 0x000EFC01, PPC_WRTEE) /* dlmzb */ GEN_HANDLER(dlmzb, 0x1F, 0x0E, 0x02, 0x00000000, PPC_440_SPEC) { tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]); tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]); gen_op_440_dlmzb(); tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]); tcg_gen_andi_tl(cpu_xer, cpu_xer, ~0x7F); tcg_gen_or_tl(cpu_xer, cpu_xer, cpu_T[0]); if (Rc(ctx->opcode)) { gen_op_440_dlmzb_update_Rc(); tcg_gen_trunc_tl_i32(cpu_crf[0], cpu_T[0]); tcg_gen_andi_i32(cpu_crf[0], cpu_crf[0], 0xf); } TCGv_i32 t0 = tcg_const_i32(Rc(ctx->opcode)); gen_helper_dlmzb(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], t0); tcg_temp_free_i32(t0); } /* mbar replaces eieio on 440 */ Loading