Commit ecfe10c9 authored by Anthony Liguori's avatar Anthony Liguori
Browse files

Merge remote-tracking branch 'pmaydell/tags/pull-target-arm-20130820' into staging 



target-arm queue

# gpg: Signature made Tue 20 Aug 2013 08:56:28 AM CDT using RSA key ID 14360CDE
# gpg: Can't check signature: public key not found

# By Peter Maydell (20) and Peter Chubb (1)
# Via Peter Maydell
* pmaydell/tags/pull-target-arm-20130820: (21 commits)
  hw/timer/imx_epit: Simplify and fix imx_epit implementation
  default-configs: Fix A9MP and A15MP config names
  hw/cpu/a15mpcore: Wire generic timer outputs to GIC inputs
  target-arm: Implement the generic timer
  target-arm: Support coprocessor registers which do I/O
  target-arm: Allow raw_read() and raw_write() to handle 64 bit regs
  hw/arm/pic_cpu: Remove the now-unneeded arm_pic_init_cpu()
  hw/arm/xilinx_zynq: Don't use arm_pic_init_cpu()
  hw/arm/vexpress: Don't use arm_pic_init_cpu()
  hw/arm/versatilepb: Don't use arm_pic_init_cpu()
  hw/arm/strongarm: Don't use arm_pic_init_cpu()
  hw/arm/realview: Don't use arm_pic_init_cpu()
  hw/arm/omap*: Don't use arm_pic_init_cpu()
  hw/arm/musicpal: Don't use arm_pic_init_cpu()
  hw/arm/kzm: Don't use arm_pic_init_cpu()
  hw/arm/integratorcp: Don't use arm_pic_init_cpu()
  hw/arm/highbank: Don't use arm_pic_init_cpu()
  hw/arm/exynos4210: Don't use arm_pic_init_cpu()
  hw/arm/armv7m: Don't use arm_pic_init_cpu()
  target-arm: Make IRQ and FIQ gpio lines on the CPU object
  ...

Message-id: 1377007680-4934-1-git-send-email-peter.maydell@linaro.org
Signed-off-by: default avatarAnthony Liguori <anthony@codemonkey.ws>
parents 9176e8fb 23005810

default-configs/arm-softmmu.mak

+2 −2
Original line number Diff line number Diff line
@@ -34,9 +34,9 @@ CONFIG_PFLASH_CFI02=y 
CONFIG_MICRODRIVE=y

CONFIG_USB_MUSB=y



CONFIG_ARM9MPCORE=y

CONFIG_ARM11MPCORE=y

CONFIG_ARM15MPCORE=y

CONFIG_A9MPCORE=y

CONFIG_A15MPCORE=y



CONFIG_ARM_GIC=y

CONFIG_ARM_GIC_KVM=$(CONFIG_KVM)

hw/arm/Makefile.objs

+1 −1
Original line number Diff line number Diff line 
obj-y += boot.o collie.o exynos4_boards.o gumstix.o highbank.o

obj-y += integratorcp.o kzm.o mainstone.o musicpal.o nseries.o

obj-y += omap_sx1.o palm.o pic_cpu.o realview.o spitz.o stellaris.o

obj-y += omap_sx1.o palm.o realview.o spitz.o stellaris.o

obj-y += tosa.o versatilepb.o vexpress.o xilinx_zynq.o z2.o



obj-y += armv7m.o exynos4210.o pxa2xx.o pxa2xx_gpio.o pxa2xx_pic.o

hw/arm/armv7m.c

+2 −3
Original line number Diff line number Diff line
@@ -173,7 +173,6 @@ qemu_irq *armv7m_init(MemoryRegion *address_space_mem, 
    DeviceState *nvic;

    /* FIXME: make this local state.  */

    static qemu_irq pic[64];

    qemu_irq *cpu_pic;

    int image_size;

    uint64_t entry;

    uint64_t lowaddr;
@@ -221,8 +220,8 @@ qemu_irq *armv7m_init(MemoryRegion *address_space_mem, 
    nvic = qdev_create(NULL, "armv7m_nvic");

    env->nvic = nvic;

    qdev_init_nofail(nvic);

    cpu_pic = arm_pic_init_cpu(cpu);

    sysbus_connect_irq(SYS_BUS_DEVICE(nvic), 0, cpu_pic[ARM_PIC_CPU_IRQ]);

    sysbus_connect_irq(SYS_BUS_DEVICE(nvic), 0,

                       qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_IRQ));

    for (i = 0; i < 64; i++) {

        pic[i] = qdev_get_gpio_in(nvic, i);

    }

hw/arm/exynos4210.c

+3 −13
Original line number Diff line number Diff line
@@ -137,10 +137,8 @@ void exynos4210_write_secondary(ARMCPU *cpu, 
Exynos4210State *exynos4210_init(MemoryRegion *system_mem,

        unsigned long ram_size)

{

    qemu_irq cpu_irq[EXYNOS4210_NCPUS];

    int i, n;

    Exynos4210State *s = g_new(Exynos4210State, 1);

    qemu_irq *irqp;

    qemu_irq gate_irq[EXYNOS4210_NCPUS][EXYNOS4210_IRQ_GATE_NINPUTS];

    unsigned long mem_size;

    DeviceState *dev;
@@ -152,15 +150,6 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem, 
            fprintf(stderr, "Unable to find CPU %d definition\n", n);

            exit(1);

        }



        /* Create PIC controller for each processor instance */

        irqp = arm_pic_init_cpu(s->cpu[n]);



        /*

         * Get GICs gpio_in cpu_irq to connect a combiner to them later.

         * Use only IRQ for a while.

         */

        cpu_irq[n] = irqp[ARM_PIC_CPU_IRQ];

    }



    /*** IRQs ***/
@@ -178,8 +167,9 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem, 
        }

        busdev = SYS_BUS_DEVICE(dev);



        /* Connect IRQ Gate output to cpu_irq */

        sysbus_connect_irq(busdev, 0, cpu_irq[i]);

        /* Connect IRQ Gate output to CPU's IRQ line */

        sysbus_connect_irq(busdev, 0,

                           qdev_get_gpio_in(DEVICE(s->cpu[i]), ARM_CPU_IRQ));

    }



    /* Private memory region and Internal GIC */

hw/arm/highbank.c

+1 −3
Original line number Diff line number Diff line
@@ -209,7 +209,6 @@ static void calxeda_init(QEMUMachineInitArgs *args, enum cxmachines machine) 
    const char *initrd_filename = args->initrd_filename;

    DeviceState *dev = NULL;

    SysBusDevice *busdev;

    qemu_irq *irqp;

    qemu_irq pic[128];

    int n;

    qemu_irq cpu_irq[4];
@@ -239,8 +238,7 @@ static void calxeda_init(QEMUMachineInitArgs *args, enum cxmachines machine) 


        /* This will become a QOM property eventually */

        cpu->reset_cbar = GIC_BASE_ADDR;

        irqp = arm_pic_init_cpu(cpu);

        cpu_irq[n] = irqp[ARM_PIC_CPU_IRQ];

        cpu_irq[n] = qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_IRQ);

    }



    sysmem = get_system_memory();