Commit ec8e3340 authored by Peter Maydell's avatar Peter Maydell
Browse files

target/arm: Create new arm_v7m_mmu_idx_for_secstate_and_priv() 



The TT instruction is going to need to look up the MMU index
for a specified security and privilege state. Refactor the
existing arm_v7m_mmu_idx_for_secstate() into a version that
lets you specify the privilege state and one that uses the
current state of the CPU.

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Message-id: 1512153879-5291-6-git-send-email-peter.maydell@linaro.org
Reviewed-by: default avatarPhilippe Mathieu-Daudé <f4bug@amsat.org>
parent 62593718

target/arm/cpu.h

+16 −5
Original line number Diff line number Diff line
@@ -2339,14 +2339,16 @@ static inline int arm_mmu_idx_to_el(ARMMMUIdx mmu_idx) 
    }

}



/* Return the MMU index for a v7M CPU in the specified security state */

static inline ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env,

                                                     bool secstate)

/* Return the MMU index for a v7M CPU in the specified security and

 * privilege state

 */

static inline ARMMMUIdx arm_v7m_mmu_idx_for_secstate_and_priv(CPUARMState *env,

                                                              bool secstate,

                                                              bool priv)

{

    int el = arm_current_el(env);

    ARMMMUIdx mmu_idx = ARM_MMU_IDX_M;



    if (el != 0) {

    if (priv) {

        mmu_idx |= ARM_MMU_IDX_M_PRIV;

    }
@@ -2361,6 +2363,15 @@ static inline ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env, 
    return mmu_idx;

}



/* Return the MMU index for a v7M CPU in the specified security state */

static inline ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env,

                                                     bool secstate)

{

    bool priv = arm_current_el(env) != 0;



    return arm_v7m_mmu_idx_for_secstate_and_priv(env, secstate, priv);

}



/* Determine the current mmu_idx to use for normal loads/stores */

static inline int cpu_mmu_index(CPUARMState *env, bool ifetch)

{