Commit eb6490f5 authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200703' into staging 



target-arm queue:
 * i.MX6UL EVK board: put PHYs in the correct places
 * hw/arm/virt: Let the virtio-iommu bypass MSIs
 * target/arm: kvm: Handle DABT with no valid ISS
 * hw/arm/virt-acpi-build: Only expose flash on older machine types
 * target/arm: Fix temp double-free in sve ldr/str
 * hw/display/bcm2835_fb.c: Initialize all fields of struct
 * hw/arm/spitz: Code cleanup to fix Coverity-detected memory leak
 * Deprecate TileGX port

# gpg: Signature made Fri 03 Jul 2020 17:53:05 BST
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20200703: (34 commits)
  Deprecate TileGX port
  Replace uses of FROM_SSI_SLAVE() macro with QOM casts
  hw/arm/spitz: Provide usual QOM macros for corgi-ssp and spitz-lcdtg
  hw/arm/pxa2xx_pic: Use LOG_GUEST_ERROR for bad guest register accesses
  hw/arm/spitz: Use LOG_GUEST_ERROR for bad guest register accesses
  hw/gpio/zaurus.c: Use LOG_GUEST_ERROR for bad guest register accesses
  hw/arm/spitz: Encapsulate misc GPIO handling in a device
  hw/misc/max111x: Create header file for documentation, TYPE_ macros
  hw/misc/max111x: Use GPIO lines rather than max111x_set_input()
  hw/arm/spitz: Use max111x properties to set initial values
  ssi: Add ssi_realize_and_unref()
  hw/misc/max111x: Don't use vmstate_register()
  hw/misc/max111x: provide QOM properties for setting initial values
  hw/arm/spitz: Implement inbound GPIO lines for bit5 and power signals
  hw/arm/spitz: Keep pointers to scp0, scp1 in SpitzMachineState
  hw/arm/spitz: Keep pointers to MPU and SSI devices in SpitzMachineState
  hw/arm/spitz: Create SpitzMachineClass abstract base class
  hw/arm/spitz: Detabify
  hw/display/bcm2835_fb.c: Initialize all fields of struct
  target/arm: Fix temp double-free in sve ldr/str
  ...

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 0b100c8e 0f10bf84

MAINTAINERS

+1 −0
Original line number Diff line number Diff line
@@ -787,6 +787,7 @@ F: hw/gpio/max7310.c 
F: hw/gpio/zaurus.c

F: hw/misc/mst_fpga.c

F: hw/misc/max111x.c

F: include/hw/misc/max111x.h

F: include/hw/arm/pxa.h

F: include/hw/arm/sharpsl.h

F: include/hw/display/tc6393xb.h

docs/system/deprecated.rst

+11 −0
Original line number Diff line number Diff line
@@ -404,6 +404,17 @@ The above, converted to the current supported format:: 


  json:{"file.driver":"rbd", "file.pool":"rbd", "file.image":"name"}



linux-user mode CPUs

--------------------



``tilegx`` CPUs (since 5.1.0)

'''''''''''''''''''''''''''''



The ``tilegx`` guest CPU support (which was only implemented in

linux-user mode) is deprecated and will be removed in a future version

of QEMU. Support for this CPU was removed from the upstream Linux

kernel in 2018, and has also been dropped from glibc.



Related binaries

----------------

hw/arm/fsl-imx6ul.c

+10 −0
Original line number Diff line number Diff line
@@ -427,6 +427,9 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) 
            FSL_IMX6UL_ENET2_TIMER_IRQ,

        };



        object_property_set_uint(OBJECT(&s->eth[i]),

                                 s->phy_num[i],

                                 "phy-num", &error_abort);

        object_property_set_uint(OBJECT(&s->eth[i]),

                                 FSL_IMX6UL_ETH_NUM_TX_RINGS,

                                 "tx-ring-num", &error_abort);
@@ -607,10 +610,17 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) 
                                FSL_IMX6UL_OCRAM_ALIAS_ADDR, &s->ocram_alias);

}



static Property fsl_imx6ul_properties[] = {

    DEFINE_PROP_UINT32("fec1-phy-num", FslIMX6ULState, phy_num[0], 0),

    DEFINE_PROP_UINT32("fec2-phy-num", FslIMX6ULState, phy_num[1], 1),

    DEFINE_PROP_END_OF_LIST(),

};



static void fsl_imx6ul_class_init(ObjectClass *oc, void *data)

{

    DeviceClass *dc = DEVICE_CLASS(oc);



    device_class_set_props(dc, fsl_imx6ul_properties);

    dc->realize = fsl_imx6ul_realize;

    dc->desc = "i.MX6UL SOC";

    /* Reason: Uses serial_hds and nd_table in realize() directly */

hw/arm/mcimx6ul-evk.c

+2 −0
Original line number Diff line number Diff line
@@ -40,6 +40,8 @@ static void mcimx6ul_evk_init(MachineState *machine) 


    s = FSL_IMX6UL(object_new(TYPE_FSL_IMX6UL));

    object_property_add_child(OBJECT(machine), "soc", OBJECT(s));

    object_property_set_uint(OBJECT(s), 2, "fec1-phy-num", &error_fatal);

    object_property_set_uint(OBJECT(s), 1, "fec2-phy-num", &error_fatal);

    qdev_realize(DEVICE(s), NULL, &error_fatal);



    memory_region_add_subregion(get_system_memory(), FSL_IMX6UL_MMDC_ADDR,

hw/arm/pxa2xx_pic.c

+7 −2
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ 
#include "qemu/osdep.h"

#include "qapi/error.h"

#include "qemu/module.h"

#include "qemu/log.h"

#include "cpu.h"

#include "hw/arm/pxa.h"

#include "hw/sysbus.h"
@@ -166,7 +167,9 @@ static uint64_t pxa2xx_pic_mem_read(void *opaque, hwaddr offset, 
    case ICHP:	/* Highest Priority register */

        return pxa2xx_pic_highest(s);

    default:

        printf("%s: Bad register offset " REG_FMT "\n", __func__, offset);

        qemu_log_mask(LOG_GUEST_ERROR,

                      "pxa2xx_pic_mem_read: bad register offset 0x%" HWADDR_PRIx

                      "\n", offset);

        return 0;

    }

}
@@ -199,7 +202,9 @@ static void pxa2xx_pic_mem_write(void *opaque, hwaddr offset, 
        s->priority[32 + ((offset - IPR32) >> 2)] = value & 0x8000003f;

        break;

    default:

        printf("%s: Bad register offset " REG_FMT "\n", __func__, offset);

        qemu_log_mask(LOG_GUEST_ERROR,

                      "pxa2xx_pic_mem_write: bad register offset 0x%"

                      HWADDR_PRIx "\n", offset);

        return;

    }

    pxa2xx_pic_update(opaque);