Commit eac2f396 authored by Richard Henderson's avatar Richard Henderson Committed by Peter Maydell
Browse files

target/arm: Inline gen_bx_im into callers 



There are only two remaining uses of gen_bx_im.  In each case, we
know the destination mode -- not changing in the case of gen_jmp
or changing in the case of trans_BLX_i.  Use this to simplify the
surrounding code.

For trans_BLX_i, use gen_jmp for the actual branch.  For gen_jmp,
use gen_set_pc_im to set up the single-step.

Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Message-id: 20190904193059.26202-70-richard.henderson@linaro.org
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent 0831403b

target/arm/translate.c

+7 −19
Original line number Diff line number Diff line
@@ -765,21 +765,6 @@ static inline void gen_set_pc_im(DisasContext *s, target_ulong val) 
    tcg_gen_movi_i32(cpu_R[15], val);

}



/* Set PC and Thumb state from an immediate address.  */

static inline void gen_bx_im(DisasContext *s, uint32_t addr)

{

    TCGv_i32 tmp;



    s->base.is_jmp = DISAS_JUMP;

    if (s->thumb != (addr & 1)) {

        tmp = tcg_temp_new_i32();

        tcg_gen_movi_i32(tmp, addr & 1);

        tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUARMState, thumb));

        tcg_temp_free_i32(tmp);

    }

    tcg_gen_movi_i32(cpu_R[15], addr & ~1);

}



/* Set PC and Thumb state from var.  var is marked as dead.  */

static inline void gen_bx(DisasContext *s, TCGv_i32 var)

{
@@ -2725,9 +2710,8 @@ static inline void gen_jmp (DisasContext *s, uint32_t dest) 
{

    if (unlikely(is_singlestepping(s))) {

        /* An indirect jump so that we still trigger the debug exception.  */

        if (s->thumb)

            dest |= 1;

        gen_bx_im(s, dest);

        gen_set_pc_im(s, dest);

        s->base.is_jmp = DISAS_JUMP;

    } else {

        gen_goto_tb(s, 0, dest);

    }
@@ -10138,12 +10122,16 @@ static bool trans_BL(DisasContext *s, arg_i *a) 


static bool trans_BLX_i(DisasContext *s, arg_BLX_i *a)

{

    TCGv_i32 tmp;



    /* For A32, ARCH(5) is checked near the start of the uncond block. */

    if (s->thumb && (a->imm & 2)) {

        return false;

    }

    tcg_gen_movi_i32(cpu_R[14], s->base.pc_next | s->thumb);

    gen_bx_im(s, (read_pc(s) & ~3) + a->imm + !s->thumb);

    tmp = tcg_const_i32(!s->thumb);

    store_cpu_field(tmp, thumb);

    gen_jmp(s, (read_pc(s) & ~3) + a->imm);

    return true;

}