Commit eabb7b91 authored by Aurelien Jarno's avatar Aurelien Jarno Committed by Peter Maydell
Browse files

tcg: use tcg_debug_assert instead of assert (fix performance regression) 



The TCG code is quite performance sensitive, but at the same time can
also be quite tricky. That is why asserts that can be enabled with the
--enable-debug-tcg configure option.

This used to work the following way:

| #include "config.h"
|
| ...
|
| #if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG)
| /* define it to suppress various consistency checks (faster) */
| #define NDEBUG
| #endif
|
| ...
|
| #include <assert.h>

Since commit 757e725b (tcg: Clean up includes) "config.h" as been
replaced by "qemu/osdep.h" which itself includes <assert.h>. As a
consequence the assertions are always enabled, even when using
--disable-debug-tcg, causing a performance regression, especially on
targets with many registers. For instance on qemu-system-ppc the
speed difference is about 15%.

tcg_debug_assert is controlled directly by CONFIG_DEBUG_TCG and already
uses in some places. This patch replaces all the calls to assert into
calss to tcg_debug_assert.

Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: default avatarAurelien Jarno <aurelien@aurel32.net>
Message-id: 1461228530-14852-1-git-send-email-aurelien@aurel32.net
Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent b4850e5a

tcg/aarch64/tcg-target.inc.c

+12 −12
Original line number Diff line number Diff line
@@ -67,7 +67,7 @@ static const int tcg_target_call_oarg_regs[1] = { 
static inline void reloc_pc26(tcg_insn_unit *code_ptr, tcg_insn_unit *target)

{

    ptrdiff_t offset = target - code_ptr;

    assert(offset == sextract64(offset, 0, 26));

    tcg_debug_assert(offset == sextract64(offset, 0, 26));

    /* read instruction, mask away previous PC_REL26 parameter contents,

       set the proper offset, then write back the instruction. */

    *code_ptr = deposit32(*code_ptr, 0, 26, offset);
@@ -76,14 +76,14 @@ static inline void reloc_pc26(tcg_insn_unit *code_ptr, tcg_insn_unit *target) 
static inline void reloc_pc19(tcg_insn_unit *code_ptr, tcg_insn_unit *target)

{

    ptrdiff_t offset = target - code_ptr;

    assert(offset == sextract64(offset, 0, 19));

    tcg_debug_assert(offset == sextract64(offset, 0, 19));

    *code_ptr = deposit32(*code_ptr, 5, 19, offset);

}



static inline void patch_reloc(tcg_insn_unit *code_ptr, int type,

                               intptr_t value, intptr_t addend)

{

    assert(addend == 0);

    tcg_debug_assert(addend == 0);

    switch (type) {

    case R_AARCH64_JUMP26:

    case R_AARCH64_CALL26:
@@ -402,7 +402,7 @@ static void tcg_out_insn_3314(TCGContext *s, AArch64Insn insn, 
    insn |= pre << 24;

    insn |= w << 23;



    assert(ofs >= -0x200 && ofs < 0x200 && (ofs & 7) == 0);

    tcg_debug_assert(ofs >= -0x200 && ofs < 0x200 && (ofs & 7) == 0);

    insn |= (ofs & (0x7f << 3)) << (15 - 3);



    tcg_out32(s, insn | r2 << 10 | rn << 5 | r1);
@@ -412,9 +412,9 @@ static void tcg_out_insn_3401(TCGContext *s, AArch64Insn insn, TCGType ext, 
                              TCGReg rd, TCGReg rn, uint64_t aimm)

{

    if (aimm > 0xfff) {

        assert((aimm & 0xfff) == 0);

        tcg_debug_assert((aimm & 0xfff) == 0);

        aimm >>= 12;

        assert(aimm <= 0xfff);

        tcg_debug_assert(aimm <= 0xfff);

        aimm |= 1 << 12;  /* apply LSL 12 */

    }

    tcg_out32(s, insn | ext << 31 | aimm << 10 | rn << 5 | rd);
@@ -444,7 +444,7 @@ static void tcg_out_insn_3403(TCGContext *s, AArch64Insn insn, TCGType ext, 
static void tcg_out_insn_3405(TCGContext *s, AArch64Insn insn, TCGType ext,

                              TCGReg rd, uint16_t half, unsigned shift)

{

    assert((shift & ~0x30) == 0);

    tcg_debug_assert((shift & ~0x30) == 0);

    tcg_out32(s, insn | ext << 31 | shift << (21 - 4) | half << 5 | rd);

}
@@ -538,7 +538,7 @@ static void tcg_out_logicali(TCGContext *s, AArch64Insn insn, TCGType ext, 
{

    unsigned h, l, r, c;



    assert(is_limm(limm));

    tcg_debug_assert(is_limm(limm));



    h = clz64(limm);

    l = ctz64(limm);
@@ -793,7 +793,7 @@ static void tcg_out_cmp(TCGContext *s, TCGType ext, TCGReg a, 
static inline void tcg_out_goto(TCGContext *s, tcg_insn_unit *target)

{

    ptrdiff_t offset = target - s->code_ptr;

    assert(offset == sextract64(offset, 0, 26));

    tcg_debug_assert(offset == sextract64(offset, 0, 26));

    tcg_out_insn(s, 3206, B, offset);

}
@@ -867,7 +867,7 @@ static void tcg_out_brcond(TCGContext *s, TCGMemOp ext, TCGCond c, TCGArg a, 
        offset = tcg_in32(s) >> 5;

    } else {

        offset = l->u.value_ptr - s->code_ptr;

        assert(offset == sextract64(offset, 0, 19));

        tcg_debug_assert(offset == sextract64(offset, 0, 19));

    }



    if (need_cmp) {
@@ -990,7 +990,7 @@ static void * const qemu_st_helpers[16] = { 
static inline void tcg_out_adr(TCGContext *s, TCGReg rd, void *target)

{

    ptrdiff_t offset = tcg_pcrel_diff(s, target);

    assert(offset == sextract64(offset, 0, 21));

    tcg_debug_assert(offset == sextract64(offset, 0, 21));

    tcg_out_insn(s, 3406, ADR, rd, offset);

}
@@ -1294,7 +1294,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, 
#ifndef USE_DIRECT_JUMP

#error "USE_DIRECT_JUMP required for aarch64"

#endif

        assert(s->tb_jmp_offset != NULL); /* consistency for USE_DIRECT_JUMP */

        tcg_debug_assert(s->tb_jmp_offset != NULL); /* consistency for USE_DIRECT_JUMP */

        s->tb_jmp_offset[a0] = tcg_current_code_size(s);

        /* actual branch destination will be patched by

           aarch64_tb_set_jmp_target later, beware retranslation. */

tcg/arm/tcg-target.inc.c

+6 −6
Original line number Diff line number Diff line
@@ -124,8 +124,8 @@ static inline void reloc_pc24(tcg_insn_unit *code_ptr, tcg_insn_unit *target) 
static void patch_reloc(tcg_insn_unit *code_ptr, int type,

                        intptr_t value, intptr_t addend)

{

    assert(type == R_ARM_PC24);

    assert(addend == 0);

    tcg_debug_assert(type == R_ARM_PC24);

    tcg_debug_assert(addend == 0);

    reloc_pc24(code_ptr, (tcg_insn_unit *)value);

}
@@ -492,7 +492,7 @@ static inline void tcg_out_dat_rI(TCGContext *s, int cond, int opc, TCGArg dst, 
     */

    if (rhs_is_const) {

        int rot = encode_imm(rhs);

        assert(rot >= 0);

        tcg_debug_assert(rot >= 0);

        tcg_out_dat_imm(s, cond, opc, dst, lhs, rotl(rhs, rot) | (rot << 7));

    } else {

        tcg_out_dat_reg(s, cond, opc, dst, lhs, rhs, SHIFT_IMM_LSL(0));
@@ -511,7 +511,7 @@ static void tcg_out_dat_rIK(TCGContext *s, int cond, int opc, int opinv, 
        if (rot < 0) {

            rhs = ~rhs;

            rot = encode_imm(rhs);

            assert(rot >= 0);

            tcg_debug_assert(rot >= 0);

            opc = opinv;

        }

        tcg_out_dat_imm(s, cond, opc, dst, lhs, rotl(rhs, rot) | (rot << 7));
@@ -532,7 +532,7 @@ static void tcg_out_dat_rIN(TCGContext *s, int cond, int opc, int opneg, 
        if (rot < 0) {

            rhs = -rhs;

            rot = encode_imm(rhs);

            assert(rot >= 0);

            tcg_debug_assert(rot >= 0);

            opc = opneg;

        }

        tcg_out_dat_imm(s, cond, opc, dst, lhs, rotl(rhs, rot) | (rot << 7));
@@ -1100,7 +1100,7 @@ static TCGReg NAME(TCGContext *s, TCGReg argreg, ARGTYPE arg) \ 
    } else {                                                               \

        int ofs = (argreg - 4) * 4;                                        \

        EXT_ARG;                                                           \

        assert(ofs + 4 <= TCG_STATIC_CALL_ARGS_SIZE);                      \

        tcg_debug_assert(ofs + 4 <= TCG_STATIC_CALL_ARGS_SIZE);            \

        tcg_out_st32_12(s, COND_AL, arg, TCG_REG_CALL_STACK, ofs);         \

    }                                                                      \

    return argreg + 1;                                                     \

tcg/i386/tcg-target.inc.c

+4 −4
Original line number Diff line number Diff line
@@ -425,7 +425,7 @@ static void tcg_out_opc(TCGContext *s, int opc, int r, int rm, int x) 
    }

    if (opc & P_DATA16) {

        /* We should never be asking for both 16 and 64-bit operation.  */

        assert((opc & P_REXW) == 0);

        tcg_debug_assert((opc & P_REXW) == 0);

        tcg_out8(s, 0x66);

    }

    if (opc & P_ADDR32) {
@@ -599,7 +599,7 @@ static void tcg_out_modrm_sib_offset(TCGContext *s, int opc, int r, int rm, 
        if (index < 0) {

            index = 4;

        } else {

            assert(index != TCG_REG_ESP);

            tcg_debug_assert(index != TCG_REG_ESP);

        }



        tcg_out_opc(s, opc, r, rm, index);
@@ -745,14 +745,14 @@ static inline void tcg_out_rolw_8(TCGContext *s, int reg) 
static inline void tcg_out_ext8u(TCGContext *s, int dest, int src)

{

    /* movzbl */

    assert(src < 4 || TCG_TARGET_REG_BITS == 64);

    tcg_debug_assert(src < 4 || TCG_TARGET_REG_BITS == 64);

    tcg_out_modrm(s, OPC_MOVZBL + P_REXB_RM, dest, src);

}



static void tcg_out_ext8s(TCGContext *s, int dest, int src, int rexw)

{

    /* movsbl */

    assert(src < 4 || TCG_TARGET_REG_BITS == 64);

    tcg_debug_assert(src < 4 || TCG_TARGET_REG_BITS == 64);

    tcg_out_modrm(s, OPC_MOVSBL + P_REXB_RM + rexw, dest, src);

}

tcg/ia64/tcg-target.inc.c

+3 −3
Original line number Diff line number Diff line
@@ -710,8 +710,8 @@ static uint64_t get_reloc_pcrel21b_slot2(tcg_insn_unit *pc) 
static void patch_reloc(tcg_insn_unit *code_ptr, int type,

                        intptr_t value, intptr_t addend)

{

    assert(addend == 0);

    assert(type == R_IA64_PCREL21B);

    tcg_debug_assert(addend == 0);

    tcg_debug_assert(type == R_IA64_PCREL21B);

    reloc_pcrel21b_slot2(code_ptr, (tcg_insn_unit *)value);

}
@@ -809,7 +809,7 @@ static inline void tcg_out_mov(TCGContext *s, TCGType type, 


static inline uint64_t tcg_opc_movi_a(int qp, TCGReg dst, int64_t src)

{

    assert(src == sextract64(src, 0, 22));

    tcg_debug_assert(src == sextract64(src, 0, 22));

    return tcg_opc_a5(qp, OPC_ADDL_A5, dst, src, TCG_REG_R0);

}

tcg/mips/tcg-target.inc.c

+9 −9
Original line number Diff line number Diff line
@@ -127,7 +127,7 @@ static inline uint32_t reloc_pc16_val(tcg_insn_unit *pc, tcg_insn_unit *target) 
{

    /* Let the compiler perform the right-shift as part of the arithmetic.  */

    ptrdiff_t disp = target - (pc + 1);

    assert(disp == (int16_t)disp);

    tcg_debug_assert(disp == (int16_t)disp);

    return disp & 0xffff;

}
@@ -138,7 +138,7 @@ static inline void reloc_pc16(tcg_insn_unit *pc, tcg_insn_unit *target) 


static inline uint32_t reloc_26_val(tcg_insn_unit *pc, tcg_insn_unit *target)

{

    assert((((uintptr_t)pc ^ (uintptr_t)target) & 0xf0000000) == 0);

    tcg_debug_assert((((uintptr_t)pc ^ (uintptr_t)target) & 0xf0000000) == 0);

    return ((uintptr_t)target >> 2) & 0x3ffffff;

}
@@ -150,8 +150,8 @@ static inline void reloc_26(tcg_insn_unit *pc, tcg_insn_unit *target) 
static void patch_reloc(tcg_insn_unit *code_ptr, int type,

                        intptr_t value, intptr_t addend)

{

    assert(type == R_MIPS_PC16);

    assert(addend == 0);

    tcg_debug_assert(type == R_MIPS_PC16);

    tcg_debug_assert(addend == 0);

    reloc_pc16(code_ptr, (tcg_insn_unit *)value);

}
@@ -432,7 +432,7 @@ static bool tcg_out_opc_jmp(TCGContext *s, MIPSInsn opc, void *target) 
    if ((from ^ dest) & -(1 << 28)) {

        return false;

    }

    assert((dest & 3) == 0);

    tcg_debug_assert((dest & 3) == 0);



    inst = opc;

    inst |= (dest >> 2) & 0x3ffffff;
@@ -807,9 +807,9 @@ static void tcg_out_setcond2(TCGContext *s, TCGCond cond, TCGReg ret, 
    TCGReg tmp0 = TCG_TMP0;

    TCGReg tmp1 = ret;



    assert(ret != TCG_TMP0);

    tcg_debug_assert(ret != TCG_TMP0);

    if (ret == ah || ret == bh) {

        assert(ret != TCG_TMP1);

        tcg_debug_assert(ret != TCG_TMP1);

        tmp1 = TCG_TMP1;

    }
@@ -1470,8 +1470,8 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, 
    case INDEX_op_and_i32:

        if (c2 && a2 != (uint16_t)a2) {

            int msb = ctz32(~a2) - 1;

            assert(use_mips32r2_instructions);

            assert(is_p2m1(a2));

            tcg_debug_assert(use_mips32r2_instructions);

            tcg_debug_assert(is_p2m1(a2));

            tcg_out_opc_bf(s, OPC_EXT, a0, a1, msb, 0);

            break;

        }