Commit ea0ec714 authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/xtensa/tags/20191023-xtensa' into staging 



target/xtensa improvements for v4.2:

- regenerate and reimport test_mmuhifi_c3 core;
- add virt machine.

# gpg: Signature made Wed 23 Oct 2019 23:56:42 BST
# gpg:                using RSA key 2B67854B98E5327DCDEB17D851F9CC91F83FA044
# gpg:                issuer "jcmvbkbc@gmail.com"
# gpg: Good signature from "Max Filippov <filippov@cadence.com>" [unknown]
# gpg:                 aka "Max Filippov <max.filippov@cogentembedded.com>" [full]
# gpg:                 aka "Max Filippov <jcmvbkbc@gmail.com>" [full]
# Primary key fingerprint: 2B67 854B 98E5 327D CDEB  17D8 51F9 CC91 F83F A044

* remotes/xtensa/tags/20191023-xtensa:
  hw/xtensa: add virt machine
  target/xtensa: regenerate and re-import test_mmuhifi_c3 core

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents f78398bf d9e8553b

MAINTAINERS

+5 −0
Original line number Diff line number Diff line
@@ -1300,6 +1300,11 @@ M: Max Filippov <jcmvbkbc@gmail.com> 
S: Maintained

F: hw/xtensa/sim.c



virt

M: Max Filippov <jcmvbkbc@gmail.com>

S: Maintained

F: hw/xtensa/virt.c



XTFPGA (LX60, LX200, ML605, KC705)

M: Max Filippov <jcmvbkbc@gmail.com>

S: Maintained

default-configs/xtensa-softmmu.mak

+1 −0
Original line number Diff line number Diff line
@@ -5,4 +5,5 @@ CONFIG_SEMIHOSTING=y 
# Boards:

#

CONFIG_XTENSA_SIM=y

CONFIG_XTENSA_VIRT=y

CONFIG_XTENSA_XTFPGA=y

hw/xtensa/Kconfig

+6 −0
Original line number Diff line number Diff line 
config XTENSA_SIM

    bool



config XTENSA_VIRT

    bool

    select XTENSA_SIM

    select PCI_EXPRESS_GENERIC_BRIDGE

    select PCI_DEVICES



config XTENSA_XTFPGA

    bool

    select OPENCORES_ETH

hw/xtensa/Makefile.objs

+1 −0
Original line number Diff line number Diff line
@@ -2,4 +2,5 @@ obj-y += mx_pic.o 
obj-y += pic_cpu.o

obj-y += xtensa_memory.o

obj-$(CONFIG_XTENSA_SIM) += sim.o

obj-$(CONFIG_XTENSA_VIRT) += virt.o

obj-$(CONFIG_XTENSA_XTFPGA) += xtfpga.o

hw/xtensa/sim.c

+26 −15
Original line number Diff line number Diff line
@@ -37,6 +37,7 @@ 
#include "exec/address-spaces.h"

#include "qemu/error-report.h"

#include "xtensa_memory.h"

#include "xtensa_sim.h"



static uint64_t translate_phys_addr(void *opaque, uint64_t addr)

{
@@ -52,12 +53,11 @@ static void sim_reset(void *opaque) 
    cpu_reset(CPU(cpu));

}



static void xtensa_sim_init(MachineState *machine)

XtensaCPU *xtensa_sim_common_init(MachineState *machine)

{

    XtensaCPU *cpu = NULL;

    CPUXtensaState *env = NULL;

    ram_addr_t ram_size = machine->ram_size;

    const char *kernel_filename = machine->kernel_filename;

    int n;



    for (n = 0; n < machine->smp.cpus; n++) {
@@ -89,30 +89,41 @@ static void xtensa_sim_init(MachineState *machine) 
        xtensa_create_memory_regions(&sysram, "xtensa.sysram",

                                     get_system_memory());

    }



    if (serial_hd(0)) {

        xtensa_sim_open_console(serial_hd(0));

    }

    if (kernel_filename) {

        uint64_t elf_entry;

        uint64_t elf_lowaddr;

    return cpu;

}



void xtensa_sim_load_kernel(XtensaCPU *cpu, MachineState *machine)

{

    const char *kernel_filename = machine->kernel_filename;

#ifdef TARGET_WORDS_BIGENDIAN

        int success = load_elf(kernel_filename, NULL,

                               translate_phys_addr, cpu,

                               &elf_entry, &elf_lowaddr,

                               NULL, 1, EM_XTENSA, 0, 0);

    int big_endian = true;

#else

        int success = load_elf(kernel_filename, NULL,

                               translate_phys_addr, cpu,

                               &elf_entry, &elf_lowaddr,

                               NULL, 0, EM_XTENSA, 0, 0);

    int big_endian = false;

#endif



    if (kernel_filename) {

        uint64_t elf_entry;

        uint64_t elf_lowaddr;

        int success = load_elf(kernel_filename, NULL, translate_phys_addr, cpu,

                               &elf_entry, &elf_lowaddr, NULL, big_endian,

                               EM_XTENSA, 0, 0);



        if (success > 0) {

            env->pc = elf_entry;

            cpu->env.pc = elf_entry;

        }

    }

}



static void xtensa_sim_init(MachineState *machine)

{

    XtensaCPU *cpu = xtensa_sim_common_init(machine);



    xtensa_sim_load_kernel(cpu, machine);

}



static void xtensa_sim_machine_init(MachineClass *mc)

{

    mc->desc = "sim machine (" XTENSA_DEFAULT_CPU_MODEL ")";