Commit e902754e authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.8-20161006' into staging 



ppc patch queue 2016-10-06

Currently accumulated target-ppc and spapr machine related patches.
  - More POWER9 instruction implementations
  - Additional test case / enabling of test cases for Power
  - Assorted fixes

# gpg: Signature made Thu 06 Oct 2016 07:05:07 BST
# gpg:                using RSA key 0x6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>"
# gpg:                 aka "David Gibson (Red Hat) <dgibson@redhat.com>"
# gpg:                 aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
# gpg:                 aka "David Gibson (kernel.org) <dwg@kernel.org>"
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E  87DC 6C38 CACA 20D9 B392

* remotes/dgibson/tags/ppc-for-2.8-20161006: (29 commits)
  hw/ppc/spapr: Use POWER8 by default for the pseries-2.8 machine
  tests/pxe: Use -nodefaults to speed up ppc64/ipv6 pxe test
  spapr: fix check of cpu alias name in spapr_get_cpu_core_type()
  tests: enable ohci/uhci/xhci tests on PPC64
  libqos: use generic qtest_shutdown()
  libqos: add PCI management in qtest_vboot()/qtest_shutdown()
  libqos: add PPC64 PCI support
  target-ppc: fix vmx instruction type/type2
  target-ppc/kvm: Enable transactional memory on POWER8 with KVM-HV, too
  target-ppc/kvm: Add a wrapper function to check for KVM-PR
  MAINTAINERS: Add two more ppc related files
  target-ppc: Implement mtvsrws instruction
  target-ppc: add vclzlsbb/vctzlsbb instructions
  target-ppc: add vector compare not equal instructions
  target-ppc: fix invalid mask - cmpl, bctar
  target-ppc: add stxvb16x instruction
  target-ppc: add lxvb16x instruction
  target-ppc: add stxvh8x instruction
  target-ppc: add lxvh8x instruction
  target-ppc: improve stxvw4x implementation
  ...

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 0bdb12c7 3daa4a9f

MAINTAINERS

+2 −0
Original line number Diff line number Diff line
@@ -620,6 +620,7 @@ S: Maintained 
F: hw/ppc/mac_oldworld.c

F: hw/pci-host/grackle.c

F: hw/misc/macio/

F: hw/intc/heathrow_pic.c



PReP

L: qemu-devel@nongnu.org
@@ -628,6 +629,7 @@ S: Odd Fixes 
F: hw/ppc/prep.c

F: hw/pci-host/prep.[hc]

F: hw/isa/pc87312.[hc]

F: pc-bios/ppc_rom.bin



sPAPR

M: David Gibson <david@gibson.dropbear.id.au>

hw/ppc/spapr.c

+71 −33
Original line number Diff line number Diff line
@@ -546,6 +546,51 @@ static int spapr_populate_memory(sPAPRMachineState *spapr, void *fdt) 
    return 0;

}



/* Populate the "ibm,pa-features" property */

static void spapr_populate_pa_features(CPUPPCState *env, void *fdt, int offset)

{

    uint8_t pa_features_206[] = { 6, 0,

        0xf6, 0x1f, 0xc7, 0x00, 0x80, 0xc0 };

    uint8_t pa_features_207[] = { 24, 0,

        0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0,

        0x80, 0x00, 0x00, 0x00, 0x00, 0x00,

        0x00, 0x00, 0x00, 0x00, 0x80, 0x00,

        0x80, 0x00, 0x80, 0x00, 0x00, 0x00 };

    uint8_t *pa_features;

    size_t pa_size;



    switch (env->mmu_model) {

    case POWERPC_MMU_2_06:

    case POWERPC_MMU_2_06a:

        pa_features = pa_features_206;

        pa_size = sizeof(pa_features_206);

        break;

    case POWERPC_MMU_2_07:

    case POWERPC_MMU_2_07a:

        pa_features = pa_features_207;

        pa_size = sizeof(pa_features_207);

        break;

    default:

        return;

    }



    if (env->ci_large_pages) {

        /*

         * Note: we keep CI large pages off by default because a 64K capable

         * guest provisioned with large pages might otherwise try to map a qemu

         * framebuffer (or other kind of memory mapped PCI BAR) using 64K pages

         * even if that qemu runs on a 4k host.

         * We dd this bit back here if we are confident this is not an issue

         */

        pa_features[3] |= 0x20;

    }

    if (kvmppc_has_cap_htm() && pa_size > 24) {

        pa_features[24] |= 0x80;    /* Transactional memory support */

    }



    _FDT((fdt_setprop(fdt, offset, "ibm,pa-features", pa_features, pa_size)));

}



static void spapr_populate_cpu_dt(CPUState *cs, void *fdt, int offset,

                                  sPAPRMachineState *spapr)

{
@@ -573,24 +618,6 @@ static void spapr_populate_cpu_dt(CPUState *cs, void *fdt, int offset, 
        _FDT((fdt_setprop_cell(fdt, offset, "ibm,my-drc-index", drc_index)));

    }



    /* Note: we keep CI large pages off for now because a 64K capable guest

     * provisioned with large pages might otherwise try to map a qemu

     * framebuffer (or other kind of memory mapped PCI BAR) using 64K pages

     * even if that qemu runs on a 4k host.

     *

     * We can later add this bit back when we are confident this is not

     * an issue (!HV KVM or 64K host)

     */

    uint8_t pa_features_206[] = { 6, 0,

        0xf6, 0x1f, 0xc7, 0x00, 0x80, 0xc0 };

    uint8_t pa_features_207[] = { 24, 0,

        0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0,

        0x80, 0x00, 0x00, 0x00, 0x00, 0x00,

        0x00, 0x00, 0x00, 0x00, 0x80, 0x00,

        0x80, 0x00, 0x80, 0x00, 0x80, 0x00 };

    uint8_t *pa_features;

    size_t pa_size;



    _FDT((fdt_setprop_cell(fdt, offset, "reg", index)));

    _FDT((fdt_setprop_string(fdt, offset, "device_type", "cpu")));
@@ -657,18 +684,7 @@ static void spapr_populate_cpu_dt(CPUState *cs, void *fdt, int offset, 
                          page_sizes_prop, page_sizes_prop_size)));

    }



    /* Do the ibm,pa-features property, adjust it for ci-large-pages */

    if (env->mmu_model == POWERPC_MMU_2_06) {

        pa_features = pa_features_206;

        pa_size = sizeof(pa_features_206);

    } else /* env->mmu_model == POWERPC_MMU_2_07 */ {

        pa_features = pa_features_207;

        pa_size = sizeof(pa_features_207);

    }

    if (env->ci_large_pages) {

        pa_features[3] |= 0x20;

    }

    _FDT((fdt_setprop(fdt, offset, "ibm,pa-features", pa_features, pa_size)));

    spapr_populate_pa_features(env, fdt, offset);



    _FDT((fdt_setprop_cell(fdt, offset, "ibm,chip-id",

                           cs->cpu_index / vcpus_per_socket)));
@@ -1759,7 +1775,7 @@ static void ppc_spapr_init(MachineState *machine) 


    /* init CPUs */

    if (machine->cpu_model == NULL) {

        machine->cpu_model = kvm_enabled() ? "host" : "POWER7";

        machine->cpu_model = kvm_enabled() ? "host" : smc->tcg_default_cpu;

    }



    ppc_cpu_parse_features(machine->cpu_model);
@@ -2386,6 +2402,7 @@ static void spapr_machine_class_init(ObjectClass *oc, void *data) 
    mc->cpu_index_to_socket_id = spapr_cpu_index_to_socket_id;



    smc->dr_lmb_enabled = true;

    smc->tcg_default_cpu = "POWER8";

    mc->query_hotpluggable_cpus = spapr_query_hotpluggable_cpus;

    fwc->get_dev_path = spapr_get_fw_dev_path;

    nc->nmi_monitor_handler = spapr_nmi;
@@ -2436,19 +2453,40 @@ static const TypeInfo spapr_machine_info = { 
    }                                                                \

    type_init(spapr_machine_register_##suffix)



/*

 * pseries-2.8

 */

static void spapr_machine_2_8_instance_options(MachineState *machine)

{

}



static void spapr_machine_2_8_class_options(MachineClass *mc)

{

    /* Defaults for the latest behaviour inherited from the base class */

}



DEFINE_SPAPR_MACHINE(2_8, "2.8", true);



/*

 * pseries-2.7

 */

#define SPAPR_COMPAT_2_7 \

    HW_COMPAT_2_7 \



static void spapr_machine_2_7_instance_options(MachineState *machine)

{

}



static void spapr_machine_2_7_class_options(MachineClass *mc)

{

    /* Defaults for the latest behaviour inherited from the base class */

    sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);



    spapr_machine_2_8_class_options(mc);

    smc->tcg_default_cpu = "POWER7";

    SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_7);

}



DEFINE_SPAPR_MACHINE(2_7, "2.7", true);

DEFINE_SPAPR_MACHINE(2_7, "2.7", false);



/*

 * pseries-2.6

hw/ppc/spapr_cpu_core.c

+4 −4
Original line number Diff line number Diff line
@@ -92,20 +92,20 @@ char *spapr_get_cpu_core_type(const char *model) 
    gchar **model_pieces = g_strsplit(model, ",", 2);



    core_type = g_strdup_printf("%s-%s", model_pieces[0], TYPE_SPAPR_CPU_CORE);

    g_strfreev(model_pieces);



    /* Check whether it exists or whether we have to look up an alias name */

    if (!object_class_by_name(core_type)) {

        const char *realmodel;



        g_free(core_type);

        realmodel = ppc_cpu_lookup_alias(model);

        core_type = NULL;

        realmodel = ppc_cpu_lookup_alias(model_pieces[0]);

        if (realmodel) {

            return spapr_get_cpu_core_type(realmodel);

            core_type = spapr_get_cpu_core_type(realmodel);

        }

        return NULL;

    }



    g_strfreev(model_pieces);

    return core_type;

}

hw/scsi/spapr_vscsi.c

+1 −1
Original line number Diff line number Diff line
@@ -658,7 +658,7 @@ static void vscsi_process_login(VSCSIState *s, vscsi_req *req) 
    struct srp_login_rsp *rsp = &iu->srp.login_rsp;

    uint64_t tag = iu->srp.rsp.tag;



    trace_spapr_vscsi__process_login();

    trace_spapr_vscsi_process_login();



    /* TODO handle case that requested size is wrong and

     * buffer format is wrong

hw/scsi/trace-events

+1 −1
Original line number Diff line number Diff line
@@ -225,7 +225,7 @@ spapr_vscsi_command_complete_sense_data2(unsigned s8, unsigned s9, unsigned s10, 
spapr_vscsi_command_complete_status(uint32_t status) "Command complete err=%"PRIu32

spapr_vscsi_save_request(uint32_t qtag, unsigned desc, unsigned offset) "saving tag=%"PRIu32", current desc#%u, offset=0x%x"

spapr_vscsi_load_request(uint32_t qtag, unsigned desc, unsigned offset) "restoring tag=%"PRIu32", current desc#%u, offset=0x%x"

spapr_vscsi__process_login(void) "Got login, sending response !"

spapr_vscsi_process_login(void) "Got login, sending response !"

spapr_vscsi_queue_cmd_no_drive(uint64_t lun) "Command for lun %08" PRIx64 " with no drive"

spapr_vscsi_queue_cmd(uint32_t qtag, unsigned cdb, const char *cmd, int lun, int ret) "Queued command tag 0x%"PRIx32" CMD 0x%x=%s LUN %d ret: %d"

spapr_vscsi_do_crq(unsigned c0, unsigned c1) "crq: %02x %02x ..."