Commit e883e992 authored by Bin Meng's avatar Bin Meng Committed by Alistair Francis
Browse files

hw/riscv: Generate correct "mmu-type" for 32-bit machines



32-bit machine should have its CPU's "mmu-type" set to "riscv,sv32".

Signed-off-by: default avatarBin Meng <bmeng.cn@gmail.com>
Reviewed-by: default avatarAlistair Francis <alistair.francis@wdc.com>
Message-id: 1583585319-26603-1-git-send-email-bmeng.cn@gmail.com
Message-Id: <1583585319-26603-1-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: default avatarAlistair Francis <alistair.francis@wdc.com>
parent ee79e7cd
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+4 −0
Original line number Diff line number Diff line
@@ -160,7 +160,11 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap,
        qemu_fdt_add_subnode(fdt, nodename);
        /* cpu 0 is the management hart that does not have mmu */
        if (cpu != 0) {
#if defined(TARGET_RISCV32)
            qemu_fdt_setprop_string(fdt, nodename, "mmu-type", "riscv,sv32");
#else
            qemu_fdt_setprop_string(fdt, nodename, "mmu-type", "riscv,sv48");
#endif
            isa = riscv_isa_string(&s->soc.u_cpus.harts[cpu - 1]);
        } else {
            isa = riscv_isa_string(&s->soc.e_cpus.harts[0]);
+4 −0
Original line number Diff line number Diff line
@@ -102,7 +102,11 @@ static void create_fdt(SpikeState *s, const struct MemmapEntry *memmap,
        char *intc = g_strdup_printf("/cpus/cpu@%d/interrupt-controller", cpu);
        char *isa = riscv_isa_string(&s->soc.harts[cpu]);
        qemu_fdt_add_subnode(fdt, nodename);
#if defined(TARGET_RISCV32)
        qemu_fdt_setprop_string(fdt, nodename, "mmu-type", "riscv,sv32");
#else
        qemu_fdt_setprop_string(fdt, nodename, "mmu-type", "riscv,sv48");
#endif
        qemu_fdt_setprop_string(fdt, nodename, "riscv,isa", isa);
        qemu_fdt_setprop_string(fdt, nodename, "compatible", "riscv");
        qemu_fdt_setprop_string(fdt, nodename, "status", "okay");
+4 −0
Original line number Diff line number Diff line
@@ -229,7 +229,11 @@ static void create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap,
        char *intc = g_strdup_printf("/cpus/cpu@%d/interrupt-controller", cpu);
        char *isa = riscv_isa_string(&s->soc.harts[cpu]);
        qemu_fdt_add_subnode(fdt, nodename);
#if defined(TARGET_RISCV32)
        qemu_fdt_setprop_string(fdt, nodename, "mmu-type", "riscv,sv32");
#else
        qemu_fdt_setprop_string(fdt, nodename, "mmu-type", "riscv,sv48");
#endif
        qemu_fdt_setprop_string(fdt, nodename, "riscv,isa", isa);
        qemu_fdt_setprop_string(fdt, nodename, "compatible", "riscv");
        qemu_fdt_setprop_string(fdt, nodename, "status", "okay");