Commit e72c4fb8 authored by Aurelien Jarno's avatar Aurelien Jarno
Browse files

tcg/mips: fix TLB loading for BE host with 32-bit guests 



For 32-bit guest, we load a 32-bit address from the TLB, so there is no
need to compensate for the low or high part. This fixes 32-bit guests on
big-endian hosts.

Cc: qemu-stable@nongnu.org
Reviewed-by: default avatarRichard Henderson <rth@twiddle.net>
Signed-off-by: default avatarAurelien Jarno <aurelien@aurel32.net>
parent 7008d580

tcg/mips/tcg-target.c

+3 −1
Original line number Diff line number Diff line
@@ -963,9 +963,11 @@ static void tcg_out_tlb_load(TCGContext *s, TCGReg base, TCGReg addrl, 
    }



    /* Load the tlb comparator.  */

    tcg_out_opc_imm(s, OPC_LW, TCG_TMP0, TCG_REG_A0, cmp_off + LO_OFF);

    if (TARGET_LONG_BITS == 64) {

        tcg_out_opc_imm(s, OPC_LW, TCG_TMP0, TCG_REG_A0, cmp_off + LO_OFF);

        tcg_out_opc_imm(s, OPC_LW, base, TCG_REG_A0, cmp_off + HI_OFF);

    } else {

        tcg_out_opc_imm(s, OPC_LW, TCG_TMP0, TCG_REG_A0, cmp_off);

    }



    /* Mask the page bits, keeping the alignment bits to compare against.