Commit e71827bc authored by Aurelien Jarno's avatar Aurelien Jarno
Browse files

target-i386: add pclmulqdq instruction 



Reviewed-by: default avatarRichard Henderson <rth@twiddle.net>
Reviewed-by: default avatarEdgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: default avatarAurelien Jarno <aurelien@aurel32.net>
parent 8dbd3fc3

target-i386/cpu.c

+9 −10
Original line number Diff line number Diff line
@@ -387,17 +387,16 @@ typedef struct x86_def_t { 
          CPUID_PSE36 (needed for Solaris) */

          /* missing:

          CPUID_VME, CPUID_DTS, CPUID_SS, CPUID_HT, CPUID_TM, CPUID_PBE */

#define TCG_EXT_FEATURES (CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | \

          CPUID_EXT_SSSE3 | CPUID_EXT_CX16 | CPUID_EXT_SSE41 | \

          CPUID_EXT_SSE42 | CPUID_EXT_POPCNT | CPUID_EXT_MOVBE | \

          CPUID_EXT_HYPERVISOR)

#define TCG_EXT_FEATURES (CPUID_EXT_SSE3 | CPUID_EXT_PCLMULQDQ | \

          CPUID_EXT_MONITOR | CPUID_EXT_SSSE3 | CPUID_EXT_CX16 | \

          CPUID_EXT_SSE41 | CPUID_EXT_SSE42 | CPUID_EXT_POPCNT | \

          CPUID_EXT_MOVBE | CPUID_EXT_HYPERVISOR)

          /* missing:

          CPUID_EXT_PCLMULQDQ, CPUID_EXT_DTES64, CPUID_EXT_DSCPL,

          CPUID_EXT_VMX, CPUID_EXT_SMX, CPUID_EXT_EST, CPUID_EXT_TM2,

          CPUID_EXT_CID, CPUID_EXT_FMA, CPUID_EXT_XTPR, CPUID_EXT_PDCM,

          CPUID_EXT_PCID, CPUID_EXT_DCA, CPUID_EXT_X2APIC,

          CPUID_EXT_TSC_DEADLINE_TIMER, CPUID_EXT_AES, CPUID_EXT_XSAVE,

          CPUID_EXT_OSXSAVE, CPUID_EXT_AVX, CPUID_EXT_F16C,

          CPUID_EXT_DTES64, CPUID_EXT_DSCPL, CPUID_EXT_VMX, CPUID_EXT_SMX,

          CPUID_EXT_EST, CPUID_EXT_TM2, CPUID_EXT_CID, CPUID_EXT_FMA,

          CPUID_EXT_XTPR, CPUID_EXT_PDCM, CPUID_EXT_PCID, CPUID_EXT_DCA,

          CPUID_EXT_X2APIC, CPUID_EXT_TSC_DEADLINE_TIMER, CPUID_EXT_AES,

          CPUID_EXT_XSAVE, CPUID_EXT_OSXSAVE, CPUID_EXT_AVX, CPUID_EXT_F16C,

          CPUID_EXT_RDRAND */

#define TCG_EXT2_FEATURES ((TCG_FEATURES & CPUID_EXT2_AMD_ALIASES) | \

          CPUID_EXT2_NX | CPUID_EXT2_MMXEXT | CPUID_EXT2_RDTSCP | \

target-i386/ops_sse.h

+24 −0
Original line number Diff line number Diff line
@@ -2179,6 +2179,30 @@ target_ulong helper_popcnt(CPUX86State *env, target_ulong n, uint32_t type) 
    return POPCOUNT(n, 5);

#endif

}



void glue(helper_pclmulqdq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,

                                    uint32_t ctrl)

{

    uint64_t ah, al, b, resh, resl;



    ah = 0;

    al = d->Q((ctrl & 1) != 0);

    b = s->Q((ctrl & 16) != 0);

    resh = resl = 0;



    while (b) {

        if (b & 1) {

            resl ^= al;

            resh ^= ah;

        }

        ah = (ah << 1) | (al >> 63);

        al <<= 1;

        b >>= 1;

    }



    d->Q(0) = resl;

    d->Q(1) = resh;

}

#endif



#undef SHIFT

target-i386/ops_sse_header.h

+5 −0
Original line number Diff line number Diff line
@@ -336,6 +336,11 @@ DEF_HELPER_3(crc32, tl, i32, tl, i32) 
DEF_HELPER_3(popcnt, tl, env, tl, i32)

#endif



/* AES-NI op helpers */

#if SHIFT == 1

DEF_HELPER_4(glue(pclmulqdq, SUFFIX), void, env, Reg, Reg, i32)

#endif



#undef SHIFT

#undef Reg

#undef SUFFIX

target-i386/translate.c

+3 −0
Original line number Diff line number Diff line
@@ -3147,6 +3147,8 @@ struct SSEOpHelper_eppi { 
#define SSE41_OP(x) { { NULL, gen_helper_ ## x ## _xmm }, CPUID_EXT_SSE41 }

#define SSE42_OP(x) { { NULL, gen_helper_ ## x ## _xmm }, CPUID_EXT_SSE42 }

#define SSE41_SPECIAL { { NULL, SSE_SPECIAL }, CPUID_EXT_SSE41 }

#define PCLMULQDQ_OP(x) { { NULL, gen_helper_ ## x ## _xmm }, \

        CPUID_EXT_PCLMULQDQ }



static const struct SSEOpHelper_epp sse_op_table6[256] = {

    [0x00] = SSSE3_OP(pshufb),
@@ -3216,6 +3218,7 @@ static const struct SSEOpHelper_eppi sse_op_table7[256] = { 
    [0x40] = SSE41_OP(dpps),

    [0x41] = SSE41_OP(dppd),

    [0x42] = SSE41_OP(mpsadbw),

    [0x44] = PCLMULQDQ_OP(pclmulqdq),

    [0x60] = SSE42_OP(pcmpestrm),

    [0x61] = SSE42_OP(pcmpestri),

    [0x62] = SSE42_OP(pcmpistrm),