Commit e6ec5457 authored by Wei Huang's avatar Wei Huang Committed by Peter Maydell
Browse files

target-arm: Add support for PMU register PMINTENSET_EL1 



This patch adds access support for PMINTENSET_EL1.

Signed-off-by: default avatarWei Huang <wei@redhat.com>
Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Message-id: 1486504171-26807-4-git-send-email-wei@redhat.com
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent fdb86656

target/arm/cpu.h

+1 −1
Original line number Diff line number Diff line
@@ -309,7 +309,7 @@ typedef struct CPUARMState { 
        uint32_t c9_pmovsr; /* perf monitor overflow status */

        uint32_t c9_pmuserenr; /* perf monitor user enable */

        uint64_t c9_pmselr; /* perf monitor counter selection register */

        uint32_t c9_pminten; /* perf monitor interrupt enables */

        uint64_t c9_pminten; /* perf monitor interrupt enables */

        union { /* Memory attribute redirection */

            struct {

#ifdef HOST_WORDS_BIGENDIAN

target/arm/helper.c

+9 −1
Original line number Diff line number Diff line
@@ -1275,9 +1275,17 @@ static const ARMCPRegInfo v7_cp_reginfo[] = { 
      .writefn = pmuserenr_write, .raw_writefn = raw_write },

    { .name = "PMINTENSET", .cp = 15, .crn = 9, .crm = 14, .opc1 = 0, .opc2 = 1,

      .access = PL1_RW, .accessfn = access_tpm,

      .fieldoffset = offsetof(CPUARMState, cp15.c9_pminten),

      .type = ARM_CP_ALIAS,

      .fieldoffset = offsetoflow32(CPUARMState, cp15.c9_pminten),

      .resetvalue = 0,

      .writefn = pmintenset_write, .raw_writefn = raw_write },

    { .name = "PMINTENSET_EL1", .state = ARM_CP_STATE_AA64,

      .opc0 = 3, .opc1 = 0, .crn = 9, .crm = 14, .opc2 = 1,

      .access = PL1_RW, .accessfn = access_tpm,

      .type = ARM_CP_IO,

      .fieldoffset = offsetof(CPUARMState, cp15.c9_pminten),

      .writefn = pmintenset_write, .raw_writefn = raw_write,

      .resetvalue = 0x0 },

    { .name = "PMINTENCLR", .cp = 15, .crn = 9, .crm = 14, .opc1 = 0, .opc2 = 2,

      .access = PL1_RW, .accessfn = access_tpm, .type = ARM_CP_ALIAS,

      .fieldoffset = offsetof(CPUARMState, cp15.c9_pminten),