Commit e6e5906b authored by Paul Brook's avatar Paul Brook
Browse files

ColdFire target. 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2196 c046a42c-6fe2-441c-8c8c-71466251a162
parent 223b8a40

Makefile.target

+7 −0
Original line number Diff line number Diff line
@@ -197,6 +197,9 @@ OBJS+=nwfpe/fpa11.o nwfpe/fpa11_cpdo.o \ 
nwfpe/fpa11_cpdt.o nwfpe/fpa11_cprt.o nwfpe/fpopcode.o nwfpe/single_cpdo.o \

 nwfpe/double_cpdo.o nwfpe/extended_cpdo.o arm-semi.o

endif

ifeq ($(TARGET_ARCH), m68k)

OBJS+= m68k-sim.o m68k-semi.o

endif

SRCS:= $(OBJS:.o=.c)

OBJS+= libqemu.a
@@ -241,6 +244,10 @@ ifeq ($(TARGET_BASE_ARCH), sh4) 
LIBOBJS+= op_helper.o helper.o

endif



ifeq ($(TARGET_BASE_ARCH), m68k)

LIBOBJS+= helper.o

endif



# NOTE: the disassembler code is only needed for debugging

LIBOBJS+=disas.o 

ifeq ($(findstring i386, $(TARGET_ARCH) $(ARCH)),i386)

configure

+8 −2
Original line number Diff line number Diff line
@@ -362,7 +362,7 @@ if test -z "$target_list" ; then 
    fi

# the following are Linux specific

    if [ "$user" = "yes" ] ; then

        target_list="i386-user arm-user armeb-user sparc-user ppc-user mips-user mipsel-user $target_list"

        target_list="i386-user arm-user armeb-user sparc-user ppc-user mips-user mipsel-user m68k-user $target_list"

    fi

else

    target_list=`echo "$target_list" | sed -e 's/,/ /g'`
@@ -727,6 +727,7 @@ target_bigendian="no" 
[ "$target_cpu" = "ppc64" ] && target_bigendian=yes

[ "$target_cpu" = "mips" ] && target_bigendian=yes

[ "$target_cpu" = "sh4eb" ] && target_bigendian=yes

[ "$target_cpu" = "m68k" ] && target_bigendian=yes

target_softmmu="no"

if expr $target : '.*-softmmu' > /dev/null ; then

  target_softmmu="yes"
@@ -822,6 +823,11 @@ elif test "$target_cpu" = "sh4" -o "$target_cpu" = "sh4eb" ; then 
  echo "#define TARGET_ARCH \"sh4\"" >> $config_h

  echo "#define TARGET_SH4 1" >> $config_h

  bflt="yes"

elif test "$target_cpu" = "m68k" ; then

  echo "TARGET_ARCH=m68k" >> $config_mak

  echo "#define TARGET_ARCH \"m68k\"" >> $config_h

  echo "#define TARGET_M68K 1" >> $config_h

  bflt="yes"

else

  echo "Unsupported target CPU"

  exit 1
@@ -839,7 +845,7 @@ if test "$target_user_only" = "yes" ; then 
  echo "#define CONFIG_USER_ONLY 1" >> $config_h

fi



if test "$target_cpu" = "arm" -o "$target_cpu" = "armeb" -o "$target_cpu" = "sparc" -o "$target_cpu" = "sparc64"; then

if test "$target_cpu" = "arm" -o "$target_cpu" = "armeb" -o "$target_cpu" = "sparc" -o "$target_cpu" = "sparc64" -o "$target_cpu" = "m68k"; then

  echo "CONFIG_SOFTFLOAT=yes" >> $config_mak

  echo "#define CONFIG_SOFTFLOAT 1" >> $config_h

fi

cpu-all.h

+7 −0
Original line number Diff line number Diff line
@@ -725,6 +725,13 @@ void page_unprotect_range(target_ulong data, target_ulong data_size); 
#define cpu_gen_code cpu_ppc_gen_code

#define cpu_signal_handler cpu_ppc_signal_handler



#elif defined(TARGET_M68K)

#define CPUState CPUM68KState

#define cpu_init cpu_m68k_init

#define cpu_exec cpu_m68k_exec

#define cpu_gen_code cpu_m68k_gen_code

#define cpu_signal_handler cpu_m68k_signal_handler



#elif defined(TARGET_MIPS)

#define CPUState CPUMIPSState

#define cpu_init cpu_mips_init

cpu-exec.c

+60 −2
Original line number Diff line number Diff line
@@ -40,14 +40,14 @@ int tb_invalidated_flag; 
//#define DEBUG_EXEC

//#define DEBUG_SIGNAL



#if defined(TARGET_ARM) || defined(TARGET_SPARC)

#if defined(TARGET_ARM) || defined(TARGET_SPARC) || defined(TARGET_M68K)

/* XXX: unify with i386 target */

void cpu_loop_exit(void)

{

    longjmp(env->jmp_env, 1);

}

#endif

#if !(defined(TARGET_SPARC) || defined(TARGET_SH4))

#if !(defined(TARGET_SPARC) || defined(TARGET_SH4) || defined(TARGET_M68K))

#define reg_T2

#endif
@@ -194,6 +194,10 @@ static inline TranslationBlock *tb_find_fast(void) 
    flags = env->hflags & (MIPS_HFLAG_TMASK | MIPS_HFLAG_BMASK);

    cs_base = 0;

    pc = env->PC;

#elif defined(TARGET_M68K)

    flags = env->fpcr & M68K_FPCR_PREC;

    cs_base = 0;

    pc = env->pc;

#elif defined(TARGET_SH4)

    flags = env->sr & (SR_MD | SR_RB);

    cs_base = 0;         /* XXXXX */
@@ -370,6 +374,10 @@ int cpu_exec(CPUState *env1) 
    saved_regwptr = REGWPTR;

#endif

#elif defined(TARGET_PPC)

#elif defined(TARGET_M68K)

    env->cc_op = CC_OP_FLAGS;

    env->cc_dest = env->sr & 0xf;

    env->cc_x = (env->sr >> 4) & 1;

#elif defined(TARGET_MIPS)

#elif defined(TARGET_SH4)

    /* XXXXX */
@@ -632,6 +640,12 @@ int cpu_exec(CPUState *env1) 
                    cpu_dump_state(env, logfile, fprintf, 0);

#elif defined(TARGET_PPC)

                    cpu_dump_state(env, logfile, fprintf, 0);

#elif defined(TARGET_M68K)

                    cpu_m68k_flush_flags(env, env->cc_op);

                    env->cc_op = CC_OP_FLAGS;

                    env->sr = (env->sr & 0xffe0)

                              | env->cc_dest | (env->cc_x << 4);

                    cpu_dump_state(env, logfile, fprintf, 0);

#elif defined(TARGET_MIPS)

                    cpu_dump_state(env, logfile, fprintf, 0);

#elif defined(TARGET_SH4)
@@ -846,6 +860,11 @@ int cpu_exec(CPUState *env1) 
    REGWPTR = saved_regwptr;

#endif

#elif defined(TARGET_PPC)

#elif defined(TARGET_M68K)

    cpu_m68k_flush_flags(env, env->cc_op);

    env->cc_op = CC_OP_FLAGS;

    env->sr = (env->sr & 0xffe0)

              | env->cc_dest | (env->cc_x << 4);

#elif defined(TARGET_MIPS)

#elif defined(TARGET_SH4)

    /* XXXXX */
@@ -1103,6 +1122,45 @@ static inline int handle_cpu_signal(unsigned long pc, unsigned long address, 
    return 1;

}



#elif defined(TARGET_M68K)

static inline int handle_cpu_signal(unsigned long pc, unsigned long address,

                                    int is_write, sigset_t *old_set,

                                    void *puc)

{

    TranslationBlock *tb;

    int ret;



    if (cpu_single_env)

        env = cpu_single_env; /* XXX: find a correct solution for multithread */

#if defined(DEBUG_SIGNAL)

    printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n", 

           pc, address, is_write, *(unsigned long *)old_set);

#endif

    /* XXX: locking issue */

    if (is_write && page_unprotect(address, pc, puc)) {

        return 1;

    }

    /* see if it is an MMU fault */

    ret = cpu_m68k_handle_mmu_fault(env, address, is_write, 1, 0);

    if (ret < 0)

        return 0; /* not an MMU fault */

    if (ret == 0)

        return 1; /* the MMU fault was handled without causing real CPU fault */

    /* now we have a real cpu fault */

    tb = tb_find_pc(pc);

    if (tb) {

        /* the PC is inside the translated code. It means that we have

           a virtual CPU fault */

        cpu_restore_state(tb, env, pc, puc);

    }

    /* we restore the process signal mask as the sigreturn should

       do it (XXX: use sigsetjmp) */

    sigprocmask(SIG_SETMASK, old_set, NULL);

    cpu_loop_exit();

    /* never comes here */

    return 1;

}



#elif defined (TARGET_MIPS)

static inline int handle_cpu_signal(unsigned long pc, unsigned long address,

                                    int is_write, sigset_t *old_set,

disas.c

+4 −0
Original line number Diff line number Diff line
@@ -186,6 +186,8 @@ void target_disas(FILE *out, target_ulong code, target_ulong size, int flags) 
    disasm_info.mach = bfd_mach_ppc;

#endif

    print_insn = print_insn_ppc;

#elif defined(TARGET_M68K)

    print_insn = print_insn_m68k;

#elif defined(TARGET_MIPS)

#ifdef TARGET_WORDS_BIGENDIAN

    print_insn = print_insn_big_mips;
@@ -385,6 +387,8 @@ void monitor_disas(CPUState *env, 
    disasm_info.mach = bfd_mach_ppc;

#endif

    print_insn = print_insn_ppc;

#elif defined(TARGET_M68K)

    print_insn = print_insn_m68k;

#elif defined(TARGET_MIPS)

#ifdef TARGET_WORDS_BIGENDIAN

    print_insn = print_insn_big_mips;