Commit e6e2784c authored by Yongbok Kim's avatar Yongbok Kim
Browse files

target-mips: fix bad shifts in {dextp|dextpdp} 

Fixed issues in the MIPSDSP64 instructions dextp and dextpdp.
Shifting can go out of 32 bit range.

https://bugs.launchpad.net/qemu/+bug/1631625



Reported-by: default avatarThomas Huth <thuth@redhat.com>
Reported-by: default avatarJia Liu <proljc@gmail.com>
Signed-off-by: default avatarYongbok Kim <yongbok.kim@imgtec.com>
Reviewed-by: default avatarThomas Huth <thuth@redhat.com>
parent b5a587b6

target-mips/dsp_helper.c

+2 −2
Original line number Diff line number Diff line
@@ -3477,7 +3477,7 @@ target_ulong helper_dextp(target_ulong ac, target_ulong size, CPUMIPSState *env) 


    if (sub >= -1) {

        temp = (tempB << (64 - len)) | (tempA >> len);

        temp = temp & ((0x01 << (size + 1)) - 1);

        temp = temp & ((1ULL << (size + 1)) - 1);

        set_DSPControl_efi(0, env);

    } else {

        set_DSPControl_efi(1, env);
@@ -3506,7 +3506,7 @@ target_ulong helper_dextpdp(target_ulong ac, target_ulong size, 


    if (sub >= -1) {

        temp = (tempB << (64 - len)) | (tempA >> len);

        temp = temp & ((0x01 << (size + 1)) - 1);

        temp = temp & ((1ULL << (size + 1)) - 1);

        set_DSPControl_pos(sub, env);

        set_DSPControl_efi(0, env);

    } else {