Commit e6bb7d7e authored by Thiemo Seufer's avatar Thiemo Seufer
Browse files

Fix mov[tf].ps handling for MIPS, by Richard Sandiford. 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4563 c046a42c-6fe2-441c-8c8c-71466251a162
parent 27848470

target-mips/op.c

+6 −4
Original line number Diff line number Diff line
@@ -1632,10 +1632,11 @@ FLOAT_OP(movf, s) 
}

FLOAT_OP(movf, ps)

{

    if (!(env->fpu->fcr31 & PARAM1)) {

    unsigned int mask = GET_FP_COND (env->fpu) >> PARAM1;

    if (!(mask & 1))

        WT2 = WT0;

    if (!(mask & 2))

        WTH2 = WTH0;

    }

    DEBUG_FPU_STATE();

    FORCE_RET();

}
@@ -1655,10 +1656,11 @@ FLOAT_OP(movt, s) 
}

FLOAT_OP(movt, ps)

{

    if (env->fpu->fcr31 & PARAM1) {

    unsigned int mask = GET_FP_COND (env->fpu) >> PARAM1;

    if (mask & 1)

        WT2 = WT0;

    if (mask & 2)

        WTH2 = WTH0;

    }

    DEBUG_FPU_STATE();

    FORCE_RET();

}

target-mips/translate.c

+4 −2
Original line number Diff line number Diff line
@@ -5594,7 +5594,6 @@ static void glue(gen_movcf_, fmt) (DisasContext *ctx, int cc, int tf) \ 
}

GEN_MOVCF(d);

GEN_MOVCF(s);

GEN_MOVCF(ps);

#undef GEN_MOVCF



static void gen_farith (DisasContext *ctx, uint32_t op1,
@@ -6213,7 +6212,10 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, 
        GEN_LOAD_FREG_FTN(WTH0, fs);

        GEN_LOAD_FREG_FTN(WT2, fd);

        GEN_LOAD_FREG_FTN(WTH2, fd);

        gen_movcf_ps(ctx, (ft >> 2) & 0x7, ft & 0x1);

        if (ft & 0x1)

            gen_op_float_movt_ps ((ft >> 2) & 0x7);

        else

            gen_op_float_movf_ps ((ft >> 2) & 0x7);

        GEN_STORE_FTN_FREG(fd, WT2);

        GEN_STORE_FTN_FREG(fd, WTH2);

        opn = "movcf.ps";