Commit e6383080 authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/rth/tcg-aarch-6-2' into staging 



* remotes/rth/tcg-aarch-6-2:
  tcg-aarch64: Introduce tcg_out_insn_3405
  tcg-aarch64: Support div, rem
  tcg-aarch64: Support muluh, mulsh
  tcg-aarch64: Support add2, sub2
  tcg-aarch64: Support deposit
  tcg-aarch64: Use tcg_out_insn for setcond
  tcg-aarch64: Support movcond
  tcg-aarch64: Support andc, orc, eqv, not, neg
  tcg-aarch64: Handle constant operands to and, or, xor
  tcg-aarch64: Handle constant operands to add, sub, and compare
  tcg-aarch64: Implement mov with tcg_out_insn
  tcg-aarch64: Introduce tcg_out_insn_3401
  tcg-aarch64: Convert shift insns to tcg_out_insn
  tcg-aarch64: Introduce tcg_out_insn

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 4191d0eb 582ab779

tcg/aarch64/tcg-target.c

+570 −231

File changed.

Preview size limit exceeded, changes collapsed.

tcg/aarch64/tcg-target.h

+24 −24
Original line number Diff line number Diff line
@@ -39,33 +39,33 @@ typedef enum { 
#define TCG_TARGET_CALL_STACK_OFFSET    0



/* optional instructions */

#define TCG_TARGET_HAS_div_i32          0

#define TCG_TARGET_HAS_rem_i32          0

#define TCG_TARGET_HAS_div_i32          1

#define TCG_TARGET_HAS_rem_i32          1

#define TCG_TARGET_HAS_ext8s_i32        1

#define TCG_TARGET_HAS_ext16s_i32       1

#define TCG_TARGET_HAS_ext8u_i32        1

#define TCG_TARGET_HAS_ext16u_i32       1

#define TCG_TARGET_HAS_bswap16_i32      1

#define TCG_TARGET_HAS_bswap32_i32      1

#define TCG_TARGET_HAS_not_i32          0

#define TCG_TARGET_HAS_neg_i32          0

#define TCG_TARGET_HAS_not_i32          1

#define TCG_TARGET_HAS_neg_i32          1

#define TCG_TARGET_HAS_rot_i32          1

#define TCG_TARGET_HAS_andc_i32         0

#define TCG_TARGET_HAS_orc_i32          0

#define TCG_TARGET_HAS_eqv_i32          0

#define TCG_TARGET_HAS_andc_i32         1

#define TCG_TARGET_HAS_orc_i32          1

#define TCG_TARGET_HAS_eqv_i32          1

#define TCG_TARGET_HAS_nand_i32         0

#define TCG_TARGET_HAS_nor_i32          0

#define TCG_TARGET_HAS_deposit_i32      0

#define TCG_TARGET_HAS_movcond_i32      0

#define TCG_TARGET_HAS_add2_i32         0

#define TCG_TARGET_HAS_sub2_i32         0

#define TCG_TARGET_HAS_deposit_i32      1

#define TCG_TARGET_HAS_movcond_i32      1

#define TCG_TARGET_HAS_add2_i32         1

#define TCG_TARGET_HAS_sub2_i32         1

#define TCG_TARGET_HAS_mulu2_i32        0

#define TCG_TARGET_HAS_muls2_i32        0

#define TCG_TARGET_HAS_muluh_i32        0

#define TCG_TARGET_HAS_mulsh_i32        0



#define TCG_TARGET_HAS_div_i64          0

#define TCG_TARGET_HAS_rem_i64          0

#define TCG_TARGET_HAS_div_i64          1

#define TCG_TARGET_HAS_rem_i64          1

#define TCG_TARGET_HAS_ext8s_i64        1

#define TCG_TARGET_HAS_ext16s_i64       1

#define TCG_TARGET_HAS_ext32s_i64       1
@@ -75,22 +75,22 @@ typedef enum { 
#define TCG_TARGET_HAS_bswap16_i64      1

#define TCG_TARGET_HAS_bswap32_i64      1

#define TCG_TARGET_HAS_bswap64_i64      1

#define TCG_TARGET_HAS_not_i64          0

#define TCG_TARGET_HAS_neg_i64          0

#define TCG_TARGET_HAS_not_i64          1

#define TCG_TARGET_HAS_neg_i64          1

#define TCG_TARGET_HAS_rot_i64          1

#define TCG_TARGET_HAS_andc_i64         0

#define TCG_TARGET_HAS_orc_i64          0

#define TCG_TARGET_HAS_eqv_i64          0

#define TCG_TARGET_HAS_andc_i64         1

#define TCG_TARGET_HAS_orc_i64          1

#define TCG_TARGET_HAS_eqv_i64          1

#define TCG_TARGET_HAS_nand_i64         0

#define TCG_TARGET_HAS_nor_i64          0

#define TCG_TARGET_HAS_deposit_i64      0

#define TCG_TARGET_HAS_movcond_i64      0

#define TCG_TARGET_HAS_add2_i64         0

#define TCG_TARGET_HAS_sub2_i64         0

#define TCG_TARGET_HAS_deposit_i64      1

#define TCG_TARGET_HAS_movcond_i64      1

#define TCG_TARGET_HAS_add2_i64         1

#define TCG_TARGET_HAS_sub2_i64         1

#define TCG_TARGET_HAS_mulu2_i64        0

#define TCG_TARGET_HAS_muls2_i64        0

#define TCG_TARGET_HAS_muluh_i64        0

#define TCG_TARGET_HAS_mulsh_i64        0

#define TCG_TARGET_HAS_muluh_i64        1

#define TCG_TARGET_HAS_mulsh_i64        1



enum {

    TCG_AREG0 = TCG_REG_X19,