Commit e41c9452 authored by Richard Henderson's avatar Richard Henderson
Browse files

target/alpha: Convert to CPUClass::tlb_fill 



Reviewed-by: default avatarPhilippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
parent da6bbf85

target/alpha/cpu.c

+2 −3
Original line number Diff line number Diff line
@@ -225,9 +225,8 @@ static void alpha_cpu_class_init(ObjectClass *oc, void *data) 
    cc->set_pc = alpha_cpu_set_pc;

    cc->gdb_read_register = alpha_cpu_gdb_read_register;

    cc->gdb_write_register = alpha_cpu_gdb_write_register;

#ifdef CONFIG_USER_ONLY

    cc->handle_mmu_fault = alpha_cpu_handle_mmu_fault;

#else

    cc->tlb_fill = alpha_cpu_tlb_fill;

#ifndef CONFIG_USER_ONLY

    cc->do_transaction_failed = alpha_cpu_do_transaction_failed;

    cc->do_unaligned_access = alpha_cpu_do_unaligned_access;

    cc->get_phys_page_debug = alpha_cpu_get_phys_page_debug;

target/alpha/cpu.h

+3 −2
Original line number Diff line number Diff line
@@ -475,8 +475,9 @@ void alpha_cpu_list(void); 
   is returned if the signal was handled by the virtual CPU.  */

int cpu_alpha_signal_handler(int host_signum, void *pinfo,

                             void *puc);

int alpha_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw,

                               int mmu_idx);

bool alpha_cpu_tlb_fill(CPUState *cs, vaddr address, int size,

                        MMUAccessType access_type, int mmu_idx,

                        bool probe, uintptr_t retaddr);

void QEMU_NORETURN dynamic_excp(CPUAlphaState *, uintptr_t, int, int);

void QEMU_NORETURN arith_excp(CPUAlphaState *, uintptr_t, int, uint64_t);

target/alpha/helper.c

+21 −9
Original line number Diff line number Diff line
@@ -104,14 +104,15 @@ void cpu_alpha_store_gr(CPUAlphaState *env, unsigned reg, uint64_t val) 
}



#if defined(CONFIG_USER_ONLY)

int alpha_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size,

                               int rw, int mmu_idx)

bool alpha_cpu_tlb_fill(CPUState *cs, vaddr address, int size,

                        MMUAccessType access_type, int mmu_idx,

                        bool probe, uintptr_t retaddr)

{

    AlphaCPU *cpu = ALPHA_CPU(cs);



    cs->exception_index = EXCP_MMFAULT;

    cpu->env.trap_arg0 = address;

    return 1;

    cpu_loop_exit_restore(cs, retaddr);

}

#else

/* Returns the OSF/1 entMM failure indication, or -1 on success.  */
@@ -248,26 +249,37 @@ hwaddr alpha_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) 
    return (fail >= 0 ? -1 : phys);

}



int alpha_cpu_handle_mmu_fault(CPUState *cs, vaddr addr, int size, int rw,

                               int mmu_idx)

bool alpha_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,

                        MMUAccessType access_type, int mmu_idx,

                        bool probe, uintptr_t retaddr)

{

    AlphaCPU *cpu = ALPHA_CPU(cs);

    CPUAlphaState *env = &cpu->env;

    target_ulong phys;

    int prot, fail;



    fail = get_physical_address(env, addr, 1 << rw, mmu_idx, &phys, &prot);

    fail = get_physical_address(env, addr, 1 << access_type,

                                mmu_idx, &phys, &prot);

    if (unlikely(fail >= 0)) {

        if (probe) {

            return false;

        }

        cs->exception_index = EXCP_MMFAULT;

        env->trap_arg0 = addr;

        env->trap_arg1 = fail;

        env->trap_arg2 = (rw == 2 ? -1 : rw);

        return 1;

        env->trap_arg2 = (access_type == MMU_INST_FETCH ? -1 : access_type);

        cpu_loop_exit_restore(cs, retaddr);

    }



    tlb_set_page(cs, addr & TARGET_PAGE_MASK, phys & TARGET_PAGE_MASK,

                 prot, mmu_idx, TARGET_PAGE_SIZE);

    return 0;

    return true;

}



void tlb_fill(CPUState *cs, target_ulong addr, int size,

              MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)

{

    alpha_cpu_tlb_fill(cs, addr, size, access_type, mmu_idx, false, retaddr);

}

#endif /* USER_ONLY */

target/alpha/mem_helper.c

+0 −16
Original line number Diff line number Diff line
@@ -62,20 +62,4 @@ void alpha_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, 
    env->error_code = 0;

    cpu_loop_exit_restore(cs, retaddr);

}



/* try to fill the TLB and return an exception if error. If retaddr is

   NULL, it means that the function was called in C code (i.e. not

   from generated code or from helper.c) */

/* XXX: fix it to restore all registers */

void tlb_fill(CPUState *cs, target_ulong addr, int size,

              MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)

{

    int ret;



    ret = alpha_cpu_handle_mmu_fault(cs, addr, size, access_type, mmu_idx);

    if (unlikely(ret != 0)) {

        /* Exception index and error code are already set */

        cpu_loop_exit_restore(cs, retaddr);

    }

}

#endif /* CONFIG_USER_ONLY */