Commit e3571ae3 authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20160916' into staging 



tcg queued patches

# gpg: Signature made Fri 16 Sep 2016 16:14:20 BST
# gpg:                using RSA key 0xAD1270CC4DD0279B
# gpg: Good signature from "Richard Henderson <rth7680@gmail.com>"
# gpg:                 aka "Richard Henderson <rth@redhat.com>"
# gpg:                 aka "Richard Henderson <rth@twiddle.net>"
# Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC  16A4 AD12 70CC 4DD0 279B

* remotes/rth/tags/pull-tcg-20160916:
  tcg: Optimize fence instructions
  target-i386: Generate fences for x86
  target-aarch64: Generate fences for aarch64
  target-arm: Generate fences in ARMv7 frontend
  target-alpha: Generate fence op
  tcg/tci: Add support for fence
  tcg/sparc: Add support for fence
  tcg/s390: Add support for fence
  tcg/ppc: Add support for fence
  tcg/mips: Add support for fence
  tcg/ia64: Add support for fence
  tcg/arm: Add support for fence
  tcg/aarch64: Add support for fence
  tcg/i386: Add support for fence
  Introduce TCGOpcode for memory barrier
  cpu-exec: Check -dfilter for -d cpu
  tcg: Merge GETPC and GETRA
  tcg: Support arbitrary size + alignment

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents ebc231d7 34f93921

cpu-exec.c

+2 −1
Original line number Diff line number Diff line
@@ -147,7 +147,8 @@ static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb) 
                           itb->tc_ptr, itb->pc, lookup_symbol(itb->pc));



#if defined(DEBUG_DISAS)

    if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) {

    if (qemu_loglevel_mask(CPU_LOG_TB_CPU)

        && qemu_log_in_addr_range(itb->pc)) {

#if defined(TARGET_I386)

        log_cpu_state(cpu, CPU_DUMP_CCOP);

#elif defined(TARGET_M68K)

cputlb.c

+2 −4
Original line number Diff line number Diff line
@@ -543,10 +543,8 @@ static bool victim_tlb_hit(CPUArchState *env, size_t mmu_idx, size_t index, 
#undef MMUSUFFIX



#define MMUSUFFIX _cmmu

#undef GETPC_ADJ

#define GETPC_ADJ 0

#undef GETRA

#define GETRA() ((uintptr_t)0)

#undef GETPC

#define GETPC() ((uintptr_t)0)

#define SOFTMMU_CODE_ACCESS



#define SHIFT 0

include/exec/exec-all.h

+3 −6
Original line number Diff line number Diff line
@@ -349,13 +349,12 @@ static inline void tb_add_jump(TranslationBlock *tb, int n, 
    tb_next->jmp_list_first = (uintptr_t)tb | n;

}



/* GETRA is the true target of the return instruction that we'll execute,

   defined here for simplicity of defining the follow-up macros.  */

/* GETPC is the true target of the return instruction that we'll execute.  */

#if defined(CONFIG_TCG_INTERPRETER)

extern uintptr_t tci_tb_ptr;

# define GETRA() tci_tb_ptr

# define GETPC() tci_tb_ptr

#else

# define GETRA() \

# define GETPC() \

    ((uintptr_t)__builtin_extract_return_addr(__builtin_return_address(0)))

#endif
@@ -368,8 +367,6 @@ extern uintptr_t tci_tb_ptr; 
   smaller than 4 bytes, so we don't worry about special-casing this.  */

#define GETPC_ADJ   2



#define GETPC()  (GETRA() - GETPC_ADJ)



#if !defined(CONFIG_USER_ONLY)



struct MemoryRegion *iotlb_to_region(CPUState *cpu,

softmmu_template.h

+14 −34
Original line number Diff line number Diff line
@@ -146,14 +146,11 @@ WORD_TYPE helper_le_ld_name(CPUArchState *env, target_ulong addr, 
    unsigned mmu_idx = get_mmuidx(oi);

    int index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);

    target_ulong tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ;

    int a_bits = get_alignment_bits(get_memop(oi));

    unsigned a_bits = get_alignment_bits(get_memop(oi));

    uintptr_t haddr;

    DATA_TYPE res;



    /* Adjust the given return address.  */

    retaddr -= GETPC_ADJ;



    if (a_bits > 0 && (addr & ((1 << a_bits) - 1)) != 0) {

    if (addr & ((1 << a_bits) - 1)) {

        cpu_unaligned_access(ENV_GET_CPU(env), addr, READ_ACCESS_TYPE,

                             mmu_idx, retaddr);

    }
@@ -193,10 +190,8 @@ WORD_TYPE helper_le_ld_name(CPUArchState *env, target_ulong addr, 
    do_unaligned_access:

        addr1 = addr & ~(DATA_SIZE - 1);

        addr2 = addr1 + DATA_SIZE;

        /* Note the adjustment at the beginning of the function.

           Undo that for the recursion.  */

        res1 = helper_le_ld_name(env, addr1, oi, retaddr + GETPC_ADJ);

        res2 = helper_le_ld_name(env, addr2, oi, retaddr + GETPC_ADJ);

        res1 = helper_le_ld_name(env, addr1, oi, retaddr);

        res2 = helper_le_ld_name(env, addr2, oi, retaddr);

        shift = (addr & (DATA_SIZE - 1)) * 8;



        /* Little-endian combine.  */
@@ -220,14 +215,11 @@ WORD_TYPE helper_be_ld_name(CPUArchState *env, target_ulong addr, 
    unsigned mmu_idx = get_mmuidx(oi);

    int index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);

    target_ulong tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ;

    int a_bits = get_alignment_bits(get_memop(oi));

    unsigned a_bits = get_alignment_bits(get_memop(oi));

    uintptr_t haddr;

    DATA_TYPE res;



    /* Adjust the given return address.  */

    retaddr -= GETPC_ADJ;



    if (a_bits > 0 && (addr & ((1 << a_bits) - 1)) != 0) {

    if (addr & ((1 << a_bits) - 1)) {

        cpu_unaligned_access(ENV_GET_CPU(env), addr, READ_ACCESS_TYPE,

                             mmu_idx, retaddr);

    }
@@ -267,10 +259,8 @@ WORD_TYPE helper_be_ld_name(CPUArchState *env, target_ulong addr, 
    do_unaligned_access:

        addr1 = addr & ~(DATA_SIZE - 1);

        addr2 = addr1 + DATA_SIZE;

        /* Note the adjustment at the beginning of the function.

           Undo that for the recursion.  */

        res1 = helper_be_ld_name(env, addr1, oi, retaddr + GETPC_ADJ);

        res2 = helper_be_ld_name(env, addr2, oi, retaddr + GETPC_ADJ);

        res1 = helper_be_ld_name(env, addr1, oi, retaddr);

        res2 = helper_be_ld_name(env, addr2, oi, retaddr);

        shift = (addr & (DATA_SIZE - 1)) * 8;



        /* Big-endian combine.  */
@@ -331,13 +321,10 @@ void helper_le_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val, 
    unsigned mmu_idx = get_mmuidx(oi);

    int index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);

    target_ulong tlb_addr = env->tlb_table[mmu_idx][index].addr_write;

    int a_bits = get_alignment_bits(get_memop(oi));

    unsigned a_bits = get_alignment_bits(get_memop(oi));

    uintptr_t haddr;



    /* Adjust the given return address.  */

    retaddr -= GETPC_ADJ;



    if (a_bits > 0 && (addr & ((1 << a_bits) - 1)) != 0) {

    if (addr & ((1 << a_bits) - 1)) {

        cpu_unaligned_access(ENV_GET_CPU(env), addr, MMU_DATA_STORE,

                             mmu_idx, retaddr);

    }
@@ -391,10 +378,8 @@ void helper_le_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val, 
        for (i = 0; i < DATA_SIZE; ++i) {

            /* Little-endian extract.  */

            uint8_t val8 = val >> (i * 8);

            /* Note the adjustment at the beginning of the function.

               Undo that for the recursion.  */

            glue(helper_ret_stb, MMUSUFFIX)(env, addr + i, val8,

                                            oi, retaddr + GETPC_ADJ);

                                            oi, retaddr);

        }

        return;

    }
@@ -414,13 +399,10 @@ void helper_be_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val, 
    unsigned mmu_idx = get_mmuidx(oi);

    int index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);

    target_ulong tlb_addr = env->tlb_table[mmu_idx][index].addr_write;

    int a_bits = get_alignment_bits(get_memop(oi));

    unsigned a_bits = get_alignment_bits(get_memop(oi));

    uintptr_t haddr;



    /* Adjust the given return address.  */

    retaddr -= GETPC_ADJ;



    if (a_bits > 0 && (addr & ((1 << a_bits) - 1)) != 0) {

    if (addr & ((1 << a_bits) - 1)) {

        cpu_unaligned_access(ENV_GET_CPU(env), addr, MMU_DATA_STORE,

                             mmu_idx, retaddr);

    }
@@ -474,10 +456,8 @@ void helper_be_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val, 
        for (i = 0; i < DATA_SIZE; ++i) {

            /* Big-endian extract.  */

            uint8_t val8 = val >> (((DATA_SIZE - 1) * 8) - (i * 8));

            /* Note the adjustment at the beginning of the function.

               Undo that for the recursion.  */

            glue(helper_ret_stb, MMUSUFFIX)(env, addr + i, val8,

                                            oi, retaddr + GETPC_ADJ);

                                            oi, retaddr);

        }

        return;

    }

target-alpha/translate.c

+2 −2
Original line number Diff line number Diff line
@@ -2338,11 +2338,11 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn) 
            break;

        case 0x4000:

            /* MB */

            /* No-op */

            tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC);

            break;

        case 0x4400:

            /* WMB */

            /* No-op */

            tcg_gen_mb(TCG_MO_ST_ST | TCG_BAR_SC);

            break;

        case 0x8000:

            /* FETCH */