Commit e23f12b3 authored Oct 24, 2018 by Richard Henderson Committed by Peter Maydell Oct 24, 2018

target/arm: Promote consecutive memory ops for aa32



For a sequence of loads or stores from a single register,
little-endian operations can be promoted to an 8-byte op.
This can reduce the number of operations by a factor of 8.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20181011205206.3552-20-richard.henderson@linaro.org
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

parent ac55d007

target/arm/translate.c

+10 −0

Original line number	Diff line number	Diff line
		@@ -5011,6 +5011,16 @@ static int disas_neon_ls_insn(DisasContext *s, uint32_t insn)
		if (size == 3 && (interleave \| spacing) != 1) {
		return 1;
		}
		/* For our purposes, bytes are always little-endian. */
		if (size == 0) {
		endian = MO_LE;
		}
		/* Consecutive little-endian elements from a single register
		* can be promoted to a larger little-endian operation.
		*/
		if (interleave == 1 && endian == MO_LE) {
		size = 3;
		}
		tmp64 = tcg_temp_new_i64();
		addr = tcg_temp_new_i32();
		tmp2 = tcg_const_i32(1 << size);