Commit e0eeb4a2 authored by Alex Bennée's avatar Alex Bennée Committed by Paolo Bonzini
Browse files

cpus: pass CPUState to run_on_cpu helpers 



CPUState is a fairly common pointer to pass to these helpers. This means
if you need other arguments for the async_run_on_cpu case you end up
having to do a g_malloc to stuff additional data into the routine. For
the current users this isn't a massive deal but for MTTCG this gets
cumbersome when the only other parameter is often an address.

This adds the typedef run_on_cpu_func for helper functions which has an
explicit CPUState * passed as the first parameter. All the users of
run_on_cpu and async_run_on_cpu have had their helpers updated to use
CPUState where available.

Signed-off-by: default avatarAlex Bennée <alex.bennee@linaro.org>
[Sergey Fedorov:
 - eliminate more CPUState in user data;
 - remove unnecessary user data passing;
 - fix target-s390x/kvm.c and target-s390x/misc_helper.c]
Signed-off-by: default avatarSergey Fedorov <sergey.fedorov@linaro.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au> (ppc parts)
Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> (s390 parts)
Signed-off-by: default avatarAlex Bennée <alex.bennee@linaro.org>
Message-Id: <1470158864-17651-3-git-send-email-alex.bennee@linaro.org>
Reviewed-by: default avatarRichard Henderson <rth@twiddle.net>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 4a058899

cpus.c

+7 −8
Original line number Diff line number Diff line
@@ -557,9 +557,8 @@ static const VMStateDescription vmstate_timers = { 
    }

};



static void cpu_throttle_thread(void *opaque)

static void cpu_throttle_thread(CPUState *cpu, void *opaque)

{

    CPUState *cpu = opaque;

    double pct;

    double throttle_ratio;

    long sleeptime_ns;
@@ -589,7 +588,7 @@ static void cpu_throttle_timer_tick(void *opaque) 
    }

    CPU_FOREACH(cpu) {

        if (!atomic_xchg(&cpu->throttle_thread_scheduled, 1)) {

            async_run_on_cpu(cpu, cpu_throttle_thread, cpu);

            async_run_on_cpu(cpu, cpu_throttle_thread, NULL);

        }

    }
@@ -917,12 +916,12 @@ void qemu_init_cpu_loop(void) 
    qemu_thread_get_self(&io_thread);

}



void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data)

void run_on_cpu(CPUState *cpu, run_on_cpu_func func, void *data)

{

    struct qemu_work_item wi;



    if (qemu_cpu_is_self(cpu)) {

        func(data);

        func(cpu, data);

        return;

    }
@@ -950,12 +949,12 @@ void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data) 
    }

}



void async_run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data)

void async_run_on_cpu(CPUState *cpu, run_on_cpu_func func, void *data)

{

    struct qemu_work_item *wi;



    if (qemu_cpu_is_self(cpu)) {

        func(data);

        func(cpu, data);

        return;

    }
@@ -1006,7 +1005,7 @@ static void flush_queued_work(CPUState *cpu) 
            cpu->queued_work_last = NULL;

        }

        qemu_mutex_unlock(&cpu->work_mutex);

        wi->func(wi->data);

        wi->func(cpu, wi->data);

        qemu_mutex_lock(&cpu->work_mutex);

        if (wi->free) {

            g_free(wi);

hw/i386/kvm/apic.c

+2 −3
Original line number Diff line number Diff line
@@ -125,7 +125,7 @@ static void kvm_apic_vapic_base_update(APICCommonState *s) 
    }

}



static void kvm_apic_put(void *data)

static void kvm_apic_put(CPUState *cs, void *data)

{

    APICCommonState *s = data;

    struct kvm_lapic_state kapic;
@@ -146,10 +146,9 @@ static void kvm_apic_post_load(APICCommonState *s) 
    run_on_cpu(CPU(s->cpu), kvm_apic_put, s);

}



static void do_inject_external_nmi(void *data)

static void do_inject_external_nmi(CPUState *cpu, void *data)

{

    APICCommonState *s = data;

    CPUState *cpu = CPU(s->cpu);

    uint32_t lvt;

    int ret;

hw/i386/kvmvapic.c

+3 −3
Original line number Diff line number Diff line
@@ -483,7 +483,7 @@ typedef struct VAPICEnableTPRReporting { 
    bool enable;

} VAPICEnableTPRReporting;



static void vapic_do_enable_tpr_reporting(void *data)

static void vapic_do_enable_tpr_reporting(CPUState *cpu, void *data)

{

    VAPICEnableTPRReporting *info = data;
@@ -734,10 +734,10 @@ static void vapic_realize(DeviceState *dev, Error **errp) 
    nb_option_roms++;

}



static void do_vapic_enable(void *data)

static void do_vapic_enable(CPUState *cs, void *data)

{

    VAPICROMState *s = data;

    X86CPU *cpu = X86_CPU(first_cpu);

    X86CPU *cpu = X86_CPU(cs);



    static const uint8_t enabled = 1;

    cpu_physical_memory_write(s->vapic_paddr + offsetof(VAPICState, enabled),

hw/ppc/ppce500_spin.c

+10 −21
Original line number Diff line number Diff line
@@ -54,11 +54,6 @@ typedef struct SpinState { 
    SpinInfo spin[MAX_CPUS];

} SpinState;



typedef struct spin_kick {

    PowerPCCPU *cpu;

    SpinInfo *spin;

} SpinKick;



static void spin_reset(void *opaque)

{

    SpinState *s = opaque;
@@ -89,16 +84,15 @@ static void mmubooke_create_initial_mapping(CPUPPCState *env, 
    env->tlb_dirty = true;

}



static void spin_kick(void *data)

static void spin_kick(CPUState *cs, void *data)

{

    SpinKick *kick = data;

    CPUState *cpu = CPU(kick->cpu);

    CPUPPCState *env = &kick->cpu->env;

    SpinInfo *curspin = kick->spin;

    PowerPCCPU *cpu = POWERPC_CPU(cs);

    CPUPPCState *env = &cpu->env;

    SpinInfo *curspin = data;

    hwaddr map_size = 64 * 1024 * 1024;

    hwaddr map_start;



    cpu_synchronize_state(cpu);

    cpu_synchronize_state(cs);

    stl_p(&curspin->pir, env->spr[SPR_BOOKE_PIR]);

    env->nip = ldq_p(&curspin->addr) & (map_size - 1);

    env->gpr[3] = ldq_p(&curspin->r3);
@@ -112,10 +106,10 @@ static void spin_kick(void *data) 
    map_start = ldq_p(&curspin->addr) & ~(map_size - 1);

    mmubooke_create_initial_mapping(env, 0, map_start, map_size);



    cpu->halted = 0;

    cpu->exception_index = -1;

    cpu->stopped = false;

    qemu_cpu_kick(cpu);

    cs->halted = 0;

    cs->exception_index = -1;

    cs->stopped = false;

    qemu_cpu_kick(cs);

}



static void spin_write(void *opaque, hwaddr addr, uint64_t value,
@@ -153,12 +147,7 @@ static void spin_write(void *opaque, hwaddr addr, uint64_t value, 


    if (!(ldq_p(&curspin->addr) & 1)) {

        /* run CPU */

        SpinKick kick = {

            .cpu = POWERPC_CPU(cpu),

            .spin = curspin,

        };



        run_on_cpu(cpu, spin_kick, &kick);

        run_on_cpu(cpu, spin_kick, curspin);

    }

}

hw/ppc/spapr.c

+2 −4
Original line number Diff line number Diff line
@@ -2134,10 +2134,8 @@ static void spapr_machine_finalizefn(Object *obj) 
    g_free(spapr->kvm_type);

}



static void ppc_cpu_do_nmi_on_cpu(void *arg)

static void ppc_cpu_do_nmi_on_cpu(CPUState *cs, void *arg)

{

    CPUState *cs = arg;



    cpu_synchronize_state(cs);

    ppc_cpu_do_system_reset(cs);

}
@@ -2147,7 +2145,7 @@ static void spapr_nmi(NMIState *n, int cpu_index, Error **errp) 
    CPUState *cs;



    CPU_FOREACH(cs) {

        async_run_on_cpu(cs, ppc_cpu_do_nmi_on_cpu, cs);

        async_run_on_cpu(cs, ppc_cpu_do_nmi_on_cpu, NULL);

    }

}