Commit e0014d4b authored by Eugene Minibaev's avatar Eugene Minibaev Committed by Paolo Bonzini
Browse files

Add missing bit for SSE instr in VEX decoding 



The 2-byte VEX prefix imples a leading 0Fh opcode byte.

Signed-off-by: default avatarEugene Minibaev <mail@kitsu.me>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 3bd2608d

target/i386/translate.c

+3 −1
Original line number Diff line number Diff line
@@ -4563,9 +4563,11 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) 
#endif

            rex_r = (~vex2 >> 4) & 8;

            if (b == 0xc5) {

                /* 2-byte VEX prefix: RVVVVlpp, implied 0f leading opcode byte */

                vex3 = vex2;

                b = x86_ldub_code(env, s);

                b = x86_ldub_code(env, s) | 0x100;

            } else {

                /* 3-byte VEX prefix: RXBmmmmm wVVVVlpp */

#ifdef TARGET_X86_64

                s->rex_x = (~vex2 >> 3) & 8;

                s->rex_b = (~vex2 >> 2) & 8;