Commit dfdd3e43 authored Jun 07, 2016 by Benjamin Herrenschmidt Committed by David Gibson Jun 07, 2016

ppc: POWER7 has lq/stq instructions and stq need to check ISA



The PPC_64BX instruction flag is used for a couple of newer
instructions currently on POWER8 but our implementation for
them works for POWER7 too (and already does the proper checking
of what is permitted) with one exception: stq needs to check
the ISA version.

This fixes the latter and add the instructions to POWER7

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

parent 8eb0f563

target-ppc/translate.c

+4 −1

Original line number	Diff line number	Diff line
		@@ -3047,10 +3047,13 @@ static void gen_std(DisasContext *ctx)

		rs = rS(ctx->opcode);
		if ((ctx->opcode & 0x3) == 0x2) { /* stq */

		bool legal_in_user_mode = (ctx->insns_flags2 & PPC2_LSQ_ISA207) != 0;
		bool le_is_supported = (ctx->insns_flags2 & PPC2_LSQ_ISA207) != 0;

		if (!(ctx->insns_flags & PPC_64BX)) {
		gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL);
		}

		if (!legal_in_user_mode && ctx->pr) {
		gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
		return;

target-ppc/translate_init.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -8377,7 +8377,7 @@ POWERPC_FAMILY(POWER7)(ObjectClass oc, void data)
		PPC_CACHE \| PPC_CACHE_ICBI \| PPC_CACHE_DCBZ \|
		PPC_MEM_SYNC \| PPC_MEM_EIEIO \|
		PPC_MEM_TLBIE \| PPC_MEM_TLBSYNC \|
		PPC_64B \| PPC_64H \| PPC_ALTIVEC \|
		PPC_64B \| PPC_64H \| PPC_64BX \| PPC_ALTIVEC \|
		PPC_SEGMENT_64B \| PPC_SLBI \|
		PPC_POPCNTB \| PPC_POPCNTWD;
		pcc->insns_flags2 = PPC2_VSX \| PPC2_DFP \| PPC2_DBRX \| PPC2_ISA205 \|