Commit df99d30d authored Mar 07, 2014 by Alexey Kardashevskiy Committed by Andreas Färber Mar 20, 2014

target-ppc: Introduce powerisa-207-server flag



This flag will be used to decide whether to emulate some bits of
H_SET_MODE hypercall because some are POWER8-only.

While we are here, add 2.05 flag to POWER8 family too. POWER7/7+ already
have it.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>

parent 5ec83c73

target-ppc/cpu.h

+2 −0

Original line number	Diff line number	Diff line
		@@ -1901,6 +1901,8 @@ enum {
		PPC2_LSQ_ISA207 = 0x0000000000002000ULL,
		/* ISA 2.07 Altivec */
		PPC2_ALTIVEC_207 = 0x0000000000004000ULL,
		/* PowerISA 2.07 Book3s specification */
		PPC2_ISA207S = 0x0000000000008000ULL,

		#define PPC_TCG_INSNS2 (PPC2_BOOKE206 \| PPC2_VSX \| PPC2_PRCNTL \| PPC2_DBRX \| \
		PPC2_ISA205 \| PPC2_VSX207 \| PPC2_PERM_ISA206 \| \

target-ppc/translate_init.c

+2 −1

Original line number	Diff line number	Diff line
		@@ -7173,7 +7173,8 @@ POWERPC_FAMILY(POWER8)(ObjectClass oc, void data)
		PPC2_PERM_ISA206 \| PPC2_DIVE_ISA206 \|
		PPC2_ATOMIC_ISA206 \| PPC2_FP_CVT_ISA206 \|
		PPC2_FP_TST_ISA206 \| PPC2_BCTAR_ISA207 \|
		PPC2_LSQ_ISA207 \| PPC2_ALTIVEC_207;
		PPC2_LSQ_ISA207 \| PPC2_ALTIVEC_207 \|
		PPC2_ISA205 \| PPC2_ISA207S;
		pcc->msr_mask = 0x800000000284FF36ULL;
		pcc->mmu_model = POWERPC_MMU_2_06;
		#if defined(CONFIG_SOFTMMU)