Commit df81ff51 authored by Aurelien Jarno's avatar Aurelien Jarno
Browse files

tcg/mips: inline bswap16/bswap32 ops 



Use an inline version for the bswap16 and bswap32 ops to avoid
testing for MIPS32R2 instructions availability, as these ops are
only available in that case.

Reviewed-by: default avatarRichard Henderson <rth@twiddle.net>
Signed-off-by: default avatarAurelien Jarno <aurelien@aurel32.net>
parent 988902fc

tcg/mips/tcg-target.c

+3 −4
Original line number Diff line number Diff line
@@ -1506,13 +1506,12 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, 
        }

        break;



    /* The bswap routines do not work on non-R2 CPU. In that case

       we let TCG generating the corresponding code. */

    case INDEX_op_bswap16_i32:

        tcg_out_bswap16(s, args[0], args[1]);

        tcg_out_opc_reg(s, OPC_WSBH, args[0], 0, args[1]);

        break;

    case INDEX_op_bswap32_i32:

        tcg_out_bswap32(s, args[0], args[1]);

        tcg_out_opc_reg(s, OPC_WSBH, args[0], 0, args[1]);

        tcg_out_opc_sa(s, OPC_ROTR, args[0], args[0], 16);

        break;



    case INDEX_op_ext8s_i32: