Commit df79b996 authored by Richard Henderson's avatar Richard Henderson
Browse files

tcg: Add CONFIG_ATOMIC64 



Allow qemu to build on 32-bit hosts without 64-bit atomic ops.

Even if we only allow 32-bit hosts to multi-thread emulate 32-bit
guests, we still need some way to handle the 32-bit guest using a
64-bit atomic operation.  Do so by dropping back to single-step.

Reviewed-by: default avatarEmilio G. Cota <cota@braap.org>
Reviewed-by: default avatarAlex Bennée <alex.bennee@linaro.org>
Signed-off-by: default avatarRichard Henderson <rth@twiddle.net>
parent 7ebee43e

configure

+33 −0
Original line number Diff line number Diff line
@@ -4544,6 +4544,35 @@ EOF 
  fi

fi



#########################################

# See if 64-bit atomic operations are supported.

# Note that without __atomic builtins, we can only

# assume atomic loads/stores max at pointer size.



cat > $TMPC << EOF

#include <stdint.h>

int main(void)

{

  uint64_t x = 0, y = 0;

#ifdef __ATOMIC_RELAXED

  y = __atomic_load_8(&x, 0);

  __atomic_store_8(&x, y, 0);

  __atomic_compare_exchange_8(&x, &y, x, 0, 0, 0);

  __atomic_exchange_8(&x, y, 0);

  __atomic_fetch_add_8(&x, y, 0);

#else

  typedef char is_host64[sizeof(void *) >= sizeof(uint64_t) ? 1 : -1];

  __sync_lock_test_and_set(&x, y);

  __sync_val_compare_and_swap(&x, y, 0);

  __sync_fetch_and_add(&x, y);

#endif

  return 0;

}

EOF

if compile_prog "" "" ; then

  atomic64=yes

fi



########################################

# check if getauxval is available.
@@ -5510,6 +5539,10 @@ if test "$atomic128" = "yes" ; then 
  echo "CONFIG_ATOMIC128=y" >> $config_host_mak

fi



if test "$atomic64" = "yes" ; then

  echo "CONFIG_ATOMIC64=y" >> $config_host_mak

fi



if test "$getauxval" = "yes" ; then

  echo "CONFIG_GETAUXVAL=y" >> $config_host_mak

fi

cputlb.c

+4 −0
Original line number Diff line number Diff line
@@ -687,8 +687,10 @@ static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr, 
#define DATA_SIZE 4

#include "atomic_template.h"



#ifdef CONFIG_ATOMIC64

#define DATA_SIZE 8

#include "atomic_template.h"

#endif



#ifdef CONFIG_ATOMIC128

#define DATA_SIZE 16
@@ -713,8 +715,10 @@ static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr, 
#define DATA_SIZE 4

#include "atomic_template.h"



#ifdef CONFIG_ATOMIC64

#define DATA_SIZE 8

#include "atomic_template.h"

#endif



/* Code access functions.  */

tcg-runtime.c

+7 −0
Original line number Diff line number Diff line
@@ -101,6 +101,11 @@ int64_t HELPER(mulsh_i64)(int64_t arg1, int64_t arg2) 
    return h;

}



void HELPER(exit_atomic)(CPUArchState *env)

{

    cpu_loop_exit_atomic(ENV_GET_CPU(env), GETPC());

}



#ifndef CONFIG_SOFTMMU

/* The softmmu versions of these helpers are in cputlb.c.  */
@@ -130,8 +135,10 @@ static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr, 
#define DATA_SIZE 4

#include "atomic_template.h"



#ifdef CONFIG_ATOMIC64

#define DATA_SIZE 8

#include "atomic_template.h"

#endif



/* The following is only callable from other helpers, and matches up

   with the softmmu version.  */

tcg/tcg-op.c

+18 −4
Original line number Diff line number Diff line
@@ -2040,14 +2040,20 @@ typedef void (*gen_atomic_op_i32)(TCGv_i32, TCGv_env, TCGv, TCGv_i32); 
typedef void (*gen_atomic_op_i64)(TCGv_i64, TCGv_env, TCGv, TCGv_i64);

#endif



#ifdef CONFIG_ATOMIC64

# define WITH_ATOMIC64(X) X,

#else

# define WITH_ATOMIC64(X)

#endif



static void * const table_cmpxchg[16] = {

    [MO_8] = gen_helper_atomic_cmpxchgb,

    [MO_16 | MO_LE] = gen_helper_atomic_cmpxchgw_le,

    [MO_16 | MO_BE] = gen_helper_atomic_cmpxchgw_be,

    [MO_32 | MO_LE] = gen_helper_atomic_cmpxchgl_le,

    [MO_32 | MO_BE] = gen_helper_atomic_cmpxchgl_be,

    [MO_64 | MO_LE] = gen_helper_atomic_cmpxchgq_le,

    [MO_64 | MO_BE] = gen_helper_atomic_cmpxchgq_be,

    WITH_ATOMIC64([MO_64 | MO_LE] = gen_helper_atomic_cmpxchgq_le)

    WITH_ATOMIC64([MO_64 | MO_BE] = gen_helper_atomic_cmpxchgq_be)

};



void tcg_gen_atomic_cmpxchg_i32(TCGv_i32 retv, TCGv addr, TCGv_i32 cmpv,
@@ -2117,6 +2123,7 @@ void tcg_gen_atomic_cmpxchg_i64(TCGv_i64 retv, TCGv addr, TCGv_i64 cmpv, 
        }

        tcg_temp_free_i64(t1);

    } else if ((memop & MO_SIZE) == MO_64) {

#ifdef CONFIG_ATOMIC64

        gen_atomic_cx_i64 gen;



        gen = table_cmpxchg[memop & (MO_SIZE | MO_BSWAP)];
@@ -2131,6 +2138,9 @@ void tcg_gen_atomic_cmpxchg_i64(TCGv_i64 retv, TCGv addr, TCGv_i64 cmpv, 
#else

        gen(retv, tcg_ctx.tcg_env, addr, cmpv, newv);

#endif

#else

        gen_helper_exit_atomic(tcg_ctx.tcg_env);

#endif /* CONFIG_ATOMIC64 */

    } else {

        TCGv_i32 c32 = tcg_temp_new_i32();

        TCGv_i32 n32 = tcg_temp_new_i32();
@@ -2218,6 +2228,7 @@ static void do_atomic_op_i64(TCGv_i64 ret, TCGv addr, TCGv_i64 val, 
    memop = tcg_canonicalize_memop(memop, 1, 0);



    if ((memop & MO_SIZE) == MO_64) {

#ifdef CONFIG_ATOMIC64

        gen_atomic_op_i64 gen;



        gen = table[memop & (MO_SIZE | MO_BSWAP)];
@@ -2232,6 +2243,9 @@ static void do_atomic_op_i64(TCGv_i64 ret, TCGv addr, TCGv_i64 val, 
#else

        gen(ret, tcg_ctx.tcg_env, addr, val);

#endif

#else

        gen_helper_exit_atomic(tcg_ctx.tcg_env);

#endif /* CONFIG_ATOMIC64 */

    } else {

        TCGv_i32 v32 = tcg_temp_new_i32();

        TCGv_i32 r32 = tcg_temp_new_i32();
@@ -2256,8 +2270,8 @@ static void * const table_##NAME[16] = { \ 
    [MO_16 | MO_BE] = gen_helper_atomic_##NAME##w_be,                   \

    [MO_32 | MO_LE] = gen_helper_atomic_##NAME##l_le,                   \

    [MO_32 | MO_BE] = gen_helper_atomic_##NAME##l_be,                   \

    [MO_64 | MO_LE] = gen_helper_atomic_##NAME##q_le,                   \

    [MO_64 | MO_BE] = gen_helper_atomic_##NAME##q_be,                   \

    WITH_ATOMIC64([MO_64 | MO_LE] = gen_helper_atomic_##NAME##q_le)     \

    WITH_ATOMIC64([MO_64 | MO_BE] = gen_helper_atomic_##NAME##q_be)     \

};                                                                      \

void tcg_gen_atomic_##NAME##_i32                                        \

    (TCGv_i32 ret, TCGv addr, TCGv_i32 val, TCGArg idx, TCGMemOp memop) \

tcg/tcg-runtime.h

+40 −6
Original line number Diff line number Diff line
@@ -15,23 +15,28 @@ DEF_HELPER_FLAGS_2(sar_i64, TCG_CALL_NO_RWG_SE, s64, s64, s64) 
DEF_HELPER_FLAGS_2(mulsh_i64, TCG_CALL_NO_RWG_SE, s64, s64, s64)

DEF_HELPER_FLAGS_2(muluh_i64, TCG_CALL_NO_RWG_SE, i64, i64, i64)



DEF_HELPER_FLAGS_1(exit_atomic, TCG_CALL_NO_WG, noreturn, env)



#ifdef CONFIG_SOFTMMU



DEF_HELPER_FLAGS_5(atomic_cmpxchgb, TCG_CALL_NO_WG,

                   i32, env, tl, i32, i32, i32)

DEF_HELPER_FLAGS_5(atomic_cmpxchgw_be, TCG_CALL_NO_WG,

                   i32, env, tl, i32, i32, i32)

DEF_HELPER_FLAGS_5(atomic_cmpxchgl_be, TCG_CALL_NO_WG,

                   i32, env, tl, i32, i32, i32)

DEF_HELPER_FLAGS_5(atomic_cmpxchgq_be, TCG_CALL_NO_WG,

                   i64, env, tl, i64, i64, i32)

DEF_HELPER_FLAGS_5(atomic_cmpxchgw_le, TCG_CALL_NO_WG,

                   i32, env, tl, i32, i32, i32)

DEF_HELPER_FLAGS_5(atomic_cmpxchgl_be, TCG_CALL_NO_WG,

                   i32, env, tl, i32, i32, i32)

DEF_HELPER_FLAGS_5(atomic_cmpxchgl_le, TCG_CALL_NO_WG,

                   i32, env, tl, i32, i32, i32)

#ifdef CONFIG_ATOMIC64

DEF_HELPER_FLAGS_5(atomic_cmpxchgq_be, TCG_CALL_NO_WG,

                   i64, env, tl, i64, i64, i32)

DEF_HELPER_FLAGS_5(atomic_cmpxchgq_le, TCG_CALL_NO_WG,

                   i64, env, tl, i64, i64, i32)

#endif



#ifdef CONFIG_ATOMIC64

#define GEN_ATOMIC_HELPERS(NAME)                                  \

    DEF_HELPER_FLAGS_4(glue(glue(atomic_, NAME), b),              \

                       TCG_CALL_NO_WG, i32, env, tl, i32, i32)    \
@@ -47,17 +52,33 @@ DEF_HELPER_FLAGS_5(atomic_cmpxchgq_le, TCG_CALL_NO_WG, 
                       TCG_CALL_NO_WG, i64, env, tl, i64, i32)    \

    DEF_HELPER_FLAGS_4(glue(glue(atomic_, NAME), q_be),           \

                       TCG_CALL_NO_WG, i64, env, tl, i64, i32)

#else

#define GEN_ATOMIC_HELPERS(NAME)                                  \

    DEF_HELPER_FLAGS_4(glue(glue(atomic_, NAME), b),              \

                       TCG_CALL_NO_WG, i32, env, tl, i32, i32)    \

    DEF_HELPER_FLAGS_4(glue(glue(atomic_, NAME), w_le),           \

                       TCG_CALL_NO_WG, i32, env, tl, i32, i32)    \

    DEF_HELPER_FLAGS_4(glue(glue(atomic_, NAME), w_be),           \

                       TCG_CALL_NO_WG, i32, env, tl, i32, i32)    \

    DEF_HELPER_FLAGS_4(glue(glue(atomic_, NAME), l_le),           \

                       TCG_CALL_NO_WG, i32, env, tl, i32, i32)    \

    DEF_HELPER_FLAGS_4(glue(glue(atomic_, NAME), l_be),           \

                       TCG_CALL_NO_WG, i32, env, tl, i32, i32)

#endif /* CONFIG_ATOMIC64 */



#else



DEF_HELPER_FLAGS_4(atomic_cmpxchgb, TCG_CALL_NO_WG, i32, env, tl, i32, i32)

DEF_HELPER_FLAGS_4(atomic_cmpxchgw_be, TCG_CALL_NO_WG, i32, env, tl, i32, i32)

DEF_HELPER_FLAGS_4(atomic_cmpxchgl_be, TCG_CALL_NO_WG, i32, env, tl, i32, i32)

DEF_HELPER_FLAGS_4(atomic_cmpxchgq_be, TCG_CALL_NO_WG, i64, env, tl, i64, i64)

DEF_HELPER_FLAGS_4(atomic_cmpxchgw_le, TCG_CALL_NO_WG, i32, env, tl, i32, i32)

DEF_HELPER_FLAGS_4(atomic_cmpxchgl_be, TCG_CALL_NO_WG, i32, env, tl, i32, i32)

DEF_HELPER_FLAGS_4(atomic_cmpxchgl_le, TCG_CALL_NO_WG, i32, env, tl, i32, i32)

#ifdef CONFIG_ATOMIC64

DEF_HELPER_FLAGS_4(atomic_cmpxchgq_be, TCG_CALL_NO_WG, i64, env, tl, i64, i64)

DEF_HELPER_FLAGS_4(atomic_cmpxchgq_le, TCG_CALL_NO_WG, i64, env, tl, i64, i64)

#endif



#ifdef CONFIG_ATOMIC64

#define GEN_ATOMIC_HELPERS(NAME)                             \

    DEF_HELPER_FLAGS_3(glue(glue(atomic_, NAME), b),         \

                       TCG_CALL_NO_WG, i32, env, tl, i32)    \
@@ -73,6 +94,19 @@ DEF_HELPER_FLAGS_4(atomic_cmpxchgq_le, TCG_CALL_NO_WG, i64, env, tl, i64, i64) 
                       TCG_CALL_NO_WG, i64, env, tl, i64)    \

    DEF_HELPER_FLAGS_3(glue(glue(atomic_, NAME), q_be),      \

                       TCG_CALL_NO_WG, i64, env, tl, i64)

#else

#define GEN_ATOMIC_HELPERS(NAME)                             \

    DEF_HELPER_FLAGS_3(glue(glue(atomic_, NAME), b),         \

                       TCG_CALL_NO_WG, i32, env, tl, i32)    \

    DEF_HELPER_FLAGS_3(glue(glue(atomic_, NAME), w_le),      \

                       TCG_CALL_NO_WG, i32, env, tl, i32)    \

    DEF_HELPER_FLAGS_3(glue(glue(atomic_, NAME), w_be),      \

                       TCG_CALL_NO_WG, i32, env, tl, i32)    \

    DEF_HELPER_FLAGS_3(glue(glue(atomic_, NAME), l_le),      \

                       TCG_CALL_NO_WG, i32, env, tl, i32)    \

    DEF_HELPER_FLAGS_3(glue(glue(atomic_, NAME), l_be),      \

                       TCG_CALL_NO_WG, i32, env, tl, i32)

#endif /* CONFIG_ATOMIC64 */



#endif /* CONFIG_SOFTMMU */