Loading tests/tcg/xtensa/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -42,6 +42,7 @@ TESTCASES += test_flix.tst TESTCASES += test_fp0_arith.tst TESTCASES += test_fp0_conv.tst TESTCASES += test_fp1.tst TESTCASES += test_fp_cpenable.tst TESTCASES += test_interrupt.tst TESTCASES += test_loop.tst TESTCASES += test_lsc.tst Loading tests/tcg/xtensa/test_fp_cpenable.S 0 → 100644 +27 −0 Original line number Diff line number Diff line #include "macros.inc" test_suite fp_cpenable #if XCHAL_HAVE_FP test rur set_vector kernel, 2f movi a2, 0 wsr a2, cpenable isync 1: rur a2, fsr //wfr f0, a2 test_fail 2: movi a2, 1b rsr a3, epc1 assert eq, a2, a3 movi a2, 32 rsr a3, exccause assert eq, a2, a3 test_end #endif test_suite_end Loading
tests/tcg/xtensa/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -42,6 +42,7 @@ TESTCASES += test_flix.tst TESTCASES += test_fp0_arith.tst TESTCASES += test_fp0_conv.tst TESTCASES += test_fp1.tst TESTCASES += test_fp_cpenable.tst TESTCASES += test_interrupt.tst TESTCASES += test_loop.tst TESTCASES += test_lsc.tst Loading
tests/tcg/xtensa/test_fp_cpenable.S 0 → 100644 +27 −0 Original line number Diff line number Diff line #include "macros.inc" test_suite fp_cpenable #if XCHAL_HAVE_FP test rur set_vector kernel, 2f movi a2, 0 wsr a2, cpenable isync 1: rur a2, fsr //wfr f0, a2 test_fail 2: movi a2, 1b rsr a3, epc1 assert eq, a2, a3 movi a2, 32 rsr a3, exccause assert eq, a2, a3 test_end #endif test_suite_end