Commit dda97e38 authored by Alex Richardson's avatar Alex Richardson Committed by Philippe Mathieu-Daudé
Browse files

target/mips: Fix ADD.S FPU instruction 

After merging latest QEMU upstream into our CHERI fork,
I noticed that some of the FPU tests in our MIPS baremetal
testsuite [*] started failing.
It turns out commit 1ace099f accidentally changed add.s
into a subtract.

[*] https://github.com/CTSRD-CHERI/cheritest



Fixes: 1ace099f ("target/mips: fpu: Demacro ADD.<D|S|PS>")
Signed-off-by: default avatarAlex Richardson <Alexander.Richardson@cl.cam.ac.uk>
Reviewed-by: default avatarPhilippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200703161515.25966-1-Alexander.Richardson@cl.cam.ac.uk>
Signed-off-by: default avatarAleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Signed-off-by: default avatarPhilippe Mathieu-Daudé <f4bug@amsat.org>
parent 9788e8c9

target/mips/fpu_helper.c

+1 −1
Original line number Diff line number Diff line
@@ -1221,7 +1221,7 @@ uint32_t helper_float_add_s(CPUMIPSState *env, 
{

    uint32_t wt2;



    wt2 = float32_sub(fst0, fst1, &env->active_fpu.fp_status);

    wt2 = float32_add(fst0, fst1, &env->active_fpu.fp_status);

    update_fcr31(env, GETPC());

    return wt2;

}