Commit dd5e3b17 authored by Anthony Liguori's avatar Anthony Liguori
Browse files

MTRR support on x86, part 2 (Carl-Daniel Hailfinger) 



Load and save MTRR state together with machine state.

Add support for the MTRRcap MSR which is used by the latest Bochs BIOS
and some operating systems.

Fix a typo in ext2_feature_name.

With this patch, MTRR emulation should be good enough to not trigger any
sanity checks in well behaved BIOS/kernel code.
Some corner cases for BIOS/firmware usage remain to be implemented, but
that can be deferred to another patch.
Also, MTRR accesses on hardware not supporting MTRRs should cause #GP.
That can be enforced by another patch as well.

Signed-off-by: default avatarCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: default avatarAnthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6472 c046a42c-6fe2-441c-8c8c-71466251a162
parent 7625162c

target-i386/cpu.h

+5 −0
Original line number Diff line number Diff line
@@ -251,6 +251,11 @@ 
#define MSR_IA32_APICBASE_ENABLE        (1<<11)

#define MSR_IA32_APICBASE_BASE          (0xfffff<<12)



#define MSR_MTRRcap			0xfe

#define MSR_MTRRcap_VCNT		8

#define MSR_MTRRcap_FIXRANGE_SUPPORT	(1 << 8)

#define MSR_MTRRcap_WC_SUPPORTED	(1 << 10)



#define MSR_IA32_SYSENTER_CS            0x174

#define MSR_IA32_SYSENTER_ESP           0x175

#define MSR_IA32_SYSENTER_EIP           0x176

target-i386/machine.c

+22 −1
Original line number Diff line number Diff line
@@ -134,6 +134,15 @@ void cpu_save(QEMUFile *f, void *opaque) 
    qemu_put_be16s(f, &env->intercept_dr_write);

    qemu_put_be32s(f, &env->intercept_exceptions);

    qemu_put_8s(f, &env->v_tpr);



    /* MTRRs */

    for(i = 0; i < 11; i++)

        qemu_put_be64s(f, &env->mtrr_fixed[i]);

    qemu_put_be64s(f, &env->mtrr_deftype);

    for(i = 0; i < 8; i++) {

        qemu_put_be64s(f, &env->mtrr_var[i].base);

        qemu_put_be64s(f, &env->mtrr_var[i].mask);

    }

}



#ifdef USE_X86LDOUBLE
@@ -169,7 +178,7 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id) 
    int32_t a20_mask;



    if (version_id != 3 && version_id != 4 && version_id != 5

        && version_id != 6 && version_id != 7)

        && version_id != 6 && version_id != 7 && version_id != 8)

        return -EINVAL;

    for(i = 0; i < CPU_NB_REGS; i++)

        qemu_get_betls(f, &env->regs[i]);
@@ -302,6 +311,18 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id) 
        qemu_get_be32s(f, &env->intercept_exceptions);

        qemu_get_8s(f, &env->v_tpr);

    }



    if (version_id >= 8) {

        /* MTRRs */

        for(i = 0; i < 11; i++)

            qemu_get_be64s(f, &env->mtrr_fixed[i]);

        qemu_get_be64s(f, &env->mtrr_deftype);

        for(i = 0; i < 8; i++) {

            qemu_get_be64s(f, &env->mtrr_var[i].base);

            qemu_get_be64s(f, &env->mtrr_var[i].mask);

        }

    }



    /* XXX: ensure compatiblity for halted bit ? */

    /* XXX: compute redundant hflags bits */

    env->hflags = hflags;

target-i386/op_helper.c

+7 −0
Original line number Diff line number Diff line
@@ -3215,6 +3215,13 @@ void helper_rdmsr(void) 
    case MSR_MTRRdefType:

        val = env->mtrr_deftype;

        break;

    case MSR_MTRRcap:

        if (env->cpuid_features & CPUID_MTRR)

            val = MSR_MTRRcap_VCNT | MSR_MTRRcap_FIXRANGE_SUPPORT | MSR_MTRRcap_WC_SUPPORTED;

        else

            /* XXX: exception ? */

            val = 0;

        break;

    default:

        /* XXX: exception ? */

        val = 0;