Commit dca62576 authored by Peter Crosthwaite's avatar Peter Crosthwaite Committed by John Snow
Browse files

arm: allwinner-a10: Add SATA 



Add the Allwinner A10 AHCI controller module to the SoC.

Signed-off-by: default avatarPeter Crosthwaite <crosthwaite.peter@gmail.com>
Reviewed-by: default avatarJohn Snow <jsnow@redhat.com>
Message-id: 69d6962f2d14a218bd07e9ac4ccd1947737cc30f.1445917756.git.crosthwaite.peter@gmail.com
Signed-off-by: default avatarJohn Snow <jsnow@redhat.com>
parent 377e2145

hw/arm/allwinner-a10.c

+11 −0
Original line number Diff line number Diff line
@@ -39,6 +39,9 @@ static void aw_a10_init(Object *obj) 
        qemu_check_nic_model(&nd_table[0], TYPE_AW_EMAC);

        qdev_set_nic_properties(DEVICE(&s->emac), &nd_table[0]);

    }



    object_initialize(&s->sata, sizeof(s->sata), TYPE_ALLWINNER_AHCI);

    qdev_set_parent_bus(DEVICE(&s->sata), sysbus_get_default());

}



static void aw_a10_realize(DeviceState *dev, Error **errp)
@@ -93,6 +96,14 @@ static void aw_a10_realize(DeviceState *dev, Error **errp) 
    sysbus_mmio_map(sysbusdev, 0, AW_A10_EMAC_BASE);

    sysbus_connect_irq(sysbusdev, 0, s->irq[55]);



    object_property_set_bool(OBJECT(&s->sata), true, "realized", &err);

    if (err) {

        error_propagate(errp, err);

        return;

    }

    sysbus_mmio_map(SYS_BUS_DEVICE(&s->sata), 0, AW_A10_SATA_BASE);

    sysbus_connect_irq(SYS_BUS_DEVICE(&s->sata), 0, s->irq[56]);



    /* FIXME use a qdev chardev prop instead of serial_hds[] */

    serial_mm_init(get_system_memory(), AW_A10_UART0_REG_BASE, 2, s->irq[1],

                   115200, serial_hds[0], DEVICE_NATIVE_ENDIAN);

include/hw/arm/allwinner-a10.h

+4 −0
Original line number Diff line number Diff line
@@ -7,6 +7,8 @@ 
#include "hw/timer/allwinner-a10-pit.h"

#include "hw/intc/allwinner-a10-pic.h"

#include "hw/net/allwinner_emac.h"

#include "hw/ide/pci.h"

#include "hw/ide/ahci.h"



#include "sysemu/sysemu.h"

#include "exec/address-spaces.h"
@@ -16,6 +18,7 @@ 
#define AW_A10_PIT_REG_BASE     0x01c20c00

#define AW_A10_UART0_REG_BASE   0x01c28000

#define AW_A10_EMAC_BASE        0x01c0b000

#define AW_A10_SATA_BASE        0x01c18000



#define AW_A10_SDRAM_BASE       0x40000000
@@ -32,6 +35,7 @@ typedef struct AwA10State { 
    AwA10PITState timer;

    AwA10PICState intc;

    AwEmacState emac;

    AllwinnerAHCIState sata;

} AwA10State;



#define ALLWINNER_H_