Commit dc288de0 authored by Michael Rolnik's avatar Michael Rolnik Committed by Philippe Mathieu-Daudé
Browse files

hw/misc: avr: Add limited support for power reduction device 



This is a simple device of just one register, and whenever this
register is written to it calls qemu_set_irq function for each
of 8 bits/IRQs. It is used to implement AVR Power Reduction.

[AM: Remove word 'Atmel' from filenames and all elements of code]
Suggested-by: default avatarAleksandar Markovic <aleksandar.m.mail@gmail.com>
Signed-off-by: default avatarMichael Rolnik <mrolnik@gmail.com>
Signed-off-by: default avatarPhilippe Mathieu-Daudé <f4bug@amsat.org>
[rth: Squash include fix and file rename from f4bug]
Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Signed-off-by: default avatarAleksandar Markovic <aleksandar.m.mail@gmail.com>
Reviewed-by: default avatarAlex Bennée <alex.bennee@linaro.org>
Signed-off-by: default avatarThomas Huth <huth@tuxfamily.org>
Message-Id: <20200705140315.260514-22-huth@tuxfamily.org>
parent 8ff47bc1

MAINTAINERS

+2 −0
Original line number Diff line number Diff line
@@ -987,6 +987,8 @@ F: include/hw/char/avr_usart.h 
F: hw/char/avr_usart.c

F: include/hw/timer/avr_timer16.h

F: hw/timer/avr_timer16.c

F: include/hw/misc/avr_power.h

F: hw/misc/avr_power.c



CRIS Machines

-------------

hw/misc/Kconfig

+3 −0
Original line number Diff line number Diff line
@@ -131,4 +131,7 @@ config MAC_VIA 
    select MOS6522

    select ADB



config AVR_POWER

    bool



source macio/Kconfig

hw/misc/Makefile.objs

+2 −0
Original line number Diff line number Diff line
@@ -91,3 +91,5 @@ common-obj-$(CONFIG_NRF51_SOC) += nrf51_rng.o 
obj-$(CONFIG_MAC_VIA) += mac_via.o



common-obj-$(CONFIG_GRLIB) += grlib_ahb_apb_pnp.o



obj-$(CONFIG_AVR_POWER) += avr_power.o

hw/misc/avr_power.c

0 → 100644
+113 −0
Original line number Diff line number Diff line 
/*

 * AVR Power Reduction Management

 *

 * Copyright (c) 2019-2020 Michael Rolnik

 *

 * Permission is hereby granted, free of charge, to any person obtaining a copy

 * of this software and associated documentation files (the "Software"), to deal

 * in the Software without restriction, including without limitation the rights

 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell

 * copies of the Software, and to permit persons to whom the Software is

 * furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL

 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER

 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,

 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN

 * THE SOFTWARE.

 */



#include "qemu/osdep.h"

#include "hw/misc/avr_power.h"

#include "qemu/log.h"

#include "hw/qdev-properties.h"

#include "hw/irq.h"

#include "trace.h"



static void avr_mask_reset(DeviceState *dev)

{

    AVRMaskState *s = AVR_MASK(dev);



    s->val = 0x00;



    for (int i = 0; i < 8; i++) {

        qemu_set_irq(s->irq[i], 0);

    }

}



static uint64_t avr_mask_read(void *opaque, hwaddr offset, unsigned size)

{

    assert(size == 1);

    assert(offset == 0);

    AVRMaskState *s = opaque;



    trace_avr_power_read(s->val);



    return (uint64_t)s->val;

}



static void avr_mask_write(void *opaque, hwaddr offset,

                           uint64_t val64, unsigned size)

{

    assert(size == 1);

    assert(offset == 0);

    AVRMaskState *s = opaque;

    uint8_t val8 = val64;



    trace_avr_power_write(val8);

    s->val = val8;

    for (int i = 0; i < 8; i++) {

        qemu_set_irq(s->irq[i], (val8 & (1 << i)) != 0);

    }

}



static const MemoryRegionOps avr_mask_ops = {

    .read = avr_mask_read,

    .write = avr_mask_write,

    .endianness = DEVICE_NATIVE_ENDIAN,

    .impl = {

        .max_access_size = 1,

    },

};



static void avr_mask_init(Object *dev)

{

    AVRMaskState *s = AVR_MASK(dev);

    SysBusDevice *busdev = SYS_BUS_DEVICE(dev);



    memory_region_init_io(&s->iomem, dev, &avr_mask_ops, s, TYPE_AVR_MASK,

                          0x01);

    sysbus_init_mmio(busdev, &s->iomem);



    for (int i = 0; i < 8; i++) {

        sysbus_init_irq(busdev, &s->irq[i]);

    }

    s->val = 0x00;

}



static void avr_mask_class_init(ObjectClass *klass, void *data)

{

    DeviceClass *dc = DEVICE_CLASS(klass);



    dc->reset = avr_mask_reset;

}



static const TypeInfo avr_mask_info = {

    .name          = TYPE_AVR_MASK,

    .parent        = TYPE_SYS_BUS_DEVICE,

    .instance_size = sizeof(AVRMaskState),

    .class_init    = avr_mask_class_init,

    .instance_init = avr_mask_init,

};



static void avr_mask_register_types(void)

{

    type_register_static(&avr_mask_info);

}



type_init(avr_mask_register_types)

hw/misc/trace-events

+4 −0
Original line number Diff line number Diff line
@@ -19,6 +19,10 @@ allwinner_h3_dramphy_write(uint64_t offset, uint64_t data, unsigned size) "write 
allwinner_sid_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32

allwinner_sid_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32



# avr_power.c

avr_power_read(uint8_t value) "power_reduc read value:%u"

avr_power_write(uint8_t value) "power_reduc write value:%u"



# eccmemctl.c

ecc_mem_writel_mer(uint32_t val) "Write memory enable 0x%08x"

ecc_mem_writel_mdr(uint32_t val) "Write memory delay 0x%08x"