Commit dbdc13a1 authored by Madhavan Srinivasan's avatar Madhavan Srinivasan Committed by David Gibson
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target-ppc: Move the FPSCR bit update macros to cpu.h 



Move the FPSCR bit update macros defined in dfp_helper
to cpu.h. This way, fpu_helper functions can also use them

Signed-off-by: default avatarMadhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
parent e2a176df

target-ppc/cpu.h

+21 −0
Original line number Diff line number Diff line
@@ -684,6 +684,27 @@ enum { 
#define fpscr_eex (((env->fpscr) >> FPSCR_XX) & ((env->fpscr) >> FPSCR_XE) &  \

                   0x1F)



#define FP_FX		(1ull << FPSCR_FX)

#define FP_FEX		(1ull << FPSCR_FEX)

#define FP_OX		(1ull << FPSCR_OX)

#define FP_OE		(1ull << FPSCR_OE)

#define FP_UX		(1ull << FPSCR_UX)

#define FP_UE		(1ull << FPSCR_UE)

#define FP_XX		(1ull << FPSCR_XX)

#define FP_XE		(1ull << FPSCR_XE)

#define FP_ZX		(1ull << FPSCR_ZX)

#define FP_ZE		(1ull << FPSCR_ZE)

#define FP_VX		(1ull << FPSCR_VX)

#define FP_VXSNAN	(1ull << FPSCR_VXSNAN)

#define FP_VXISI	(1ull << FPSCR_VXISI)

#define FP_VXIMZ	(1ull << FPSCR_VXIMZ)

#define FP_VXZDZ	(1ull << FPSCR_VXZDZ)

#define FP_VXIDI	(1ull << FPSCR_VXIDI)

#define FP_VXVC		(1ull << FPSCR_VXVC)

#define FP_VXCVI	(1ull << FPSCR_VXCVI)

#define FP_VE		(1ull << FPSCR_VE)

#define FP_FI		(1ull << FPSCR_FI)



/*****************************************************************************/

/* Vector status and control register */

#define VSCR_NJ		16 /* Vector non-java */

target-ppc/dfp_helper.c

+0 −21
Original line number Diff line number Diff line
@@ -170,27 +170,6 @@ static void dfp_prepare_decimal128(struct PPC_DFP *dfp, uint64_t *a, 
    }

}



#define FP_FX       (1ull << FPSCR_FX)

#define FP_FEX      (1ull << FPSCR_FEX)

#define FP_OX       (1ull << FPSCR_OX)

#define FP_OE       (1ull << FPSCR_OE)

#define FP_UX       (1ull << FPSCR_UX)

#define FP_UE       (1ull << FPSCR_UE)

#define FP_XX       (1ull << FPSCR_XX)

#define FP_XE       (1ull << FPSCR_XE)

#define FP_ZX       (1ull << FPSCR_ZX)

#define FP_ZE       (1ull << FPSCR_ZE)

#define FP_VX       (1ull << FPSCR_VX)

#define FP_VXSNAN   (1ull << FPSCR_VXSNAN)

#define FP_VXISI    (1ull << FPSCR_VXISI)

#define FP_VXIMZ    (1ull << FPSCR_VXIMZ)

#define FP_VXZDZ    (1ull << FPSCR_VXZDZ)

#define FP_VXIDI    (1ull << FPSCR_VXIDI)

#define FP_VXVC     (1ull << FPSCR_VXVC)

#define FP_VXCVI    (1ull << FPSCR_VXCVI)

#define FP_VE       (1ull << FPSCR_VE)

#define FP_FI       (1ull << FPSCR_FI)



static void dfp_set_FPSCR_flag(struct PPC_DFP *dfp, uint64_t flag,

                uint64_t enabled)

{