Commit da868a46 authored by John Snow's avatar John Snow
Browse files

ahci: add host register enumeration 



Signed-off-by: default avatarJohn Snow <jsnow@redhat.com>
Reviewed-by: default avatarPhilippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20180531222835.16558-10-jsnow@redhat.com
Signed-off-by: default avatarJohn Snow <jsnow@redhat.com>
parent 3d74e87d

hw/ide/ahci.c

+15 −0
Original line number Diff line number Diff line
@@ -47,6 +47,21 @@ static bool ahci_map_fis_address(AHCIDevice *ad); 
static void ahci_unmap_clb_address(AHCIDevice *ad);

static void ahci_unmap_fis_address(AHCIDevice *ad);



__attribute__((__unused__)) /* TODO */

static const char *AHCIHostReg_lookup[AHCI_HOST_REG__COUNT] = {

    [AHCI_HOST_REG_CAP]        = "CAP",

    [AHCI_HOST_REG_CTL]        = "GHC",

    [AHCI_HOST_REG_IRQ_STAT]   = "IS",

    [AHCI_HOST_REG_PORTS_IMPL] = "PI",

    [AHCI_HOST_REG_VERSION]    = "VS",

    [AHCI_HOST_REG_CCC_CTL]    = "CCC_CTL",

    [AHCI_HOST_REG_CCC_PORTS]  = "CCC_PORTS",

    [AHCI_HOST_REG_EM_LOC]     = "EM_LOC",

    [AHCI_HOST_REG_EM_CTL]     = "EM_CTL",

    [AHCI_HOST_REG_CAP2]       = "CAP2",

    [AHCI_HOST_REG_BOHC]       = "BOHC",

};



static const char *AHCIPortReg_lookup[AHCI_PORT_REG__COUNT] = {

    [AHCI_PORT_REG_LST_ADDR]    = "PxCLB",

    [AHCI_PORT_REG_LST_ADDR_HI] = "PxCLBU",

hw/ide/ahci_internal.h

+15 −0
Original line number Diff line number Diff line
@@ -61,6 +61,21 @@ 
#define HOST_PORTS_IMPL           0x0c /* bitmap of implemented ports */

#define HOST_VERSION              0x10 /* AHCI spec. version compliancy */



enum AHCIHostReg {

    AHCI_HOST_REG_CAP        = 0,  /* CAP: host capabilities */

    AHCI_HOST_REG_CTL        = 1,  /* GHC: global host control */

    AHCI_HOST_REG_IRQ_STAT   = 2,  /* IS: interrupt status */

    AHCI_HOST_REG_PORTS_IMPL = 3,  /* PI: bitmap of implemented ports */

    AHCI_HOST_REG_VERSION    = 4,  /* VS: AHCI spec. version compliancy */

    AHCI_HOST_REG_CCC_CTL    = 5,  /* CCC_CTL: CCC Control */

    AHCI_HOST_REG_CCC_PORTS  = 6,  /* CCC_PORTS: CCC Ports */

    AHCI_HOST_REG_EM_LOC     = 7,  /* EM_LOC: Enclosure Mgmt Location */

    AHCI_HOST_REG_EM_CTL     = 8,  /* EM_CTL: Enclosure Mgmt Control */

    AHCI_HOST_REG_CAP2       = 9,  /* CAP2: host capabilities, extended */

    AHCI_HOST_REG_BOHC       = 10, /* BOHC: firmare/os handoff ctrl & status */

    AHCI_HOST_REG__COUNT     = 11

};



/* HOST_CTL bits */

#define HOST_CTL_RESET            (1 << 0)  /* reset controller; self-clear */

#define HOST_CTL_IRQ_EN           (1 << 1)  /* global IRQ enable */