linux headers: update against Linux 5.2-rc1 (d9cb4336) · Commits · SUMMER2020 / students / proj-2021291

include/standard-headers/drivers/infiniband/hw/vmw_pvrdma/pvrdma_dev_api.h

+10 −5

Original line number	Diff line number	Diff line
		@@ -57,7 +57,8 @@

		#define PVRDMA_ROCEV1_VERSION 17
		#define PVRDMA_ROCEV2_VERSION 18
		#define PVRDMA_VERSION PVRDMA_ROCEV2_VERSION
		#define PVRDMA_PPN64_VERSION 19
		#define PVRDMA_VERSION PVRDMA_PPN64_VERSION

		#define PVRDMA_BOARD_ID 1
		#define PVRDMA_REV_ID 1
		@@ -279,8 +280,10 @@ struct pvrdma_device_shared_region {
		/* W: Async ring page info. */
		struct pvrdma_ring_page_info cq_ring_pages;
		/* W: CQ ring page info. */
		union {
		uint32_t uar_pfn; /* W: UAR pageframe. */
		uint32_t pad2; /* Pad to 8-byte align. */
		uint64_t uar_pfn64; /* W: 64-bit UAR page frame. */
		};
		struct pvrdma_device_caps caps; /* R: Device capabilities. */
		};

		@@ -411,8 +414,10 @@ struct pvrdma_cmd_query_pkey_resp {

		struct pvrdma_cmd_create_uc {
		struct pvrdma_cmd_hdr hdr;
		union {
		uint32_t pfn; /* UAR page frame number */
		uint8_t reserved[4];
		uint64_t pfn64; /* 64-bit UAR page frame number */
		};
		};

		struct pvrdma_cmd_create_uc_resp {

include/standard-headers/drm/drm_fourcc.h

+113 −1

Original line number	Diff line number	Diff line
		@@ -143,6 +143,17 @@ extern "C" {
		#define DRM_FORMAT_RGBA1010102 fourcc_code('R', 'A', '3', '0') /* [31:0] R:G:B:A 10:10:10:2 little endian */
		#define DRM_FORMAT_BGRA1010102 fourcc_code('B', 'A', '3', '0') /* [31:0] B:G:R:A 10:10:10:2 little endian */

		/*
		* Floating point 64bpp RGB
		* IEEE 754-2008 binary16 half-precision float
		* [15:0] sign:exponent:mantissa 1:5:10
		*/
		#define DRM_FORMAT_XRGB16161616F fourcc_code('X', 'R', '4', 'H') /* [63:0] x:R:G:B 16:16:16:16 little endian */
		#define DRM_FORMAT_XBGR16161616F fourcc_code('X', 'B', '4', 'H') /* [63:0] x:B:G:R 16:16:16:16 little endian */

		#define DRM_FORMAT_ARGB16161616F fourcc_code('A', 'R', '4', 'H') /* [63:0] A:R:G:B 16:16:16:16 little endian */
		#define DRM_FORMAT_ABGR16161616F fourcc_code('A', 'B', '4', 'H') /* [63:0] A:B:G:R 16:16:16:16 little endian */

		/* packed YCbCr */
		#define DRM_FORMAT_YUYV fourcc_code('Y', 'U', 'Y', 'V') /* [31:0] Cr0:Y1:Cb0:Y0 8:8:8:8 little endian */
		#define DRM_FORMAT_YVYU fourcc_code('Y', 'V', 'Y', 'U') /* [31:0] Cb0:Y1:Cr0:Y0 8:8:8:8 little endian */
		@@ -151,6 +162,28 @@ extern "C" {

		#define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */
		#define DRM_FORMAT_XYUV8888 fourcc_code('X', 'Y', 'U', 'V') /* [31:0] X:Y:Cb:Cr 8:8:8:8 little endian */
		#define DRM_FORMAT_VUY888 fourcc_code('V', 'U', '2', '4') /* [23:0] Cr:Cb:Y 8:8:8 little endian */
		#define DRM_FORMAT_VUY101010 fourcc_code('V', 'U', '3', '0') /* Y followed by U then V, 10:10:10. Non-linear modifier only */

		/*
		* packed Y2xx indicate for each component, xx valid data occupy msb
		* 16-xx padding occupy lsb
		*/
		#define DRM_FORMAT_Y210 fourcc_code('Y', '2', '1', '0') /* [63:0] Cr0:0:Y1:0:Cb0:0:Y0:0 10:6:10:6:10:6:10:6 little endian per 2 Y pixels */
		#define DRM_FORMAT_Y212 fourcc_code('Y', '2', '1', '2') /* [63:0] Cr0:0:Y1:0:Cb0:0:Y0:0 12:4:12:4:12:4:12:4 little endian per 2 Y pixels */
		#define DRM_FORMAT_Y216 fourcc_code('Y', '2', '1', '6') /* [63:0] Cr0:Y1:Cb0:Y0 16:16:16:16 little endian per 2 Y pixels */

		/*
		* packed Y4xx indicate for each component, xx valid data occupy msb
		* 16-xx padding occupy lsb except Y410
		*/
		#define DRM_FORMAT_Y410 fourcc_code('Y', '4', '1', '0') /* [31:0] A:Cr:Y:Cb 2:10:10:10 little endian */
		#define DRM_FORMAT_Y412 fourcc_code('Y', '4', '1', '2') /* [63:0] A:0:Cr:0:Y:0:Cb:0 12:4:12:4:12:4:12:4 little endian */
		#define DRM_FORMAT_Y416 fourcc_code('Y', '4', '1', '6') /* [63:0] A:Cr:Y:Cb 16:16:16:16 little endian */

		#define DRM_FORMAT_XVYU2101010 fourcc_code('X', 'V', '3', '0') /* [31:0] X:Cr:Y:Cb 2:10:10:10 little endian */
		#define DRM_FORMAT_XVYU12_16161616 fourcc_code('X', 'V', '3', '6') /* [63:0] X:0:Cr:0:Y:0:Cb:0 12:4:12:4:12:4:12:4 little endian */
		#define DRM_FORMAT_XVYU16161616 fourcc_code('X', 'V', '4', '8') /* [63:0] X:Cr:Y:Cb 16:16:16:16 little endian */

		/*
		* packed YCbCr420 2x2 tiled formats
		@@ -166,6 +199,15 @@ extern "C" {
		/* [63:0] X3:X2:Y3:Cr0:Y2:X1:X0:Y1:Cb0:Y0 1:1:10:10:10:1:1:10:10:10 little endian */
		#define DRM_FORMAT_X0L2 fourcc_code('X', '0', 'L', '2')

		/*
		* 1-plane YUV 4:2:0
		* In these formats, the component ordering is specified (Y, followed by U
		* then V), but the exact Linear layout is undefined.
		* These formats can only be used with a non-Linear modifier.
		*/
		#define DRM_FORMAT_YUV420_8BIT fourcc_code('Y', 'U', '0', '8')
		#define DRM_FORMAT_YUV420_10BIT fourcc_code('Y', 'U', '1', '0')

		/*
		* 2 plane RGB + A
		* index 0 = RGB plane, same format as the corresponding non _A8 format has
		@@ -194,6 +236,34 @@ extern "C" {
		#define DRM_FORMAT_NV24 fourcc_code('N', 'V', '2', '4') /* non-subsampled Cr:Cb plane */
		#define DRM_FORMAT_NV42 fourcc_code('N', 'V', '4', '2') /* non-subsampled Cb:Cr plane */

		/*
		* 2 plane YCbCr MSB aligned
		* index 0 = Y plane, [15:0] Y:x [10:6] little endian
		* index 1 = Cr:Cb plane, [31:0] Cr:x:Cb:x [10:6:10:6] little endian
		*/
		#define DRM_FORMAT_P210 fourcc_code('P', '2', '1', '0') /* 2x1 subsampled Cr:Cb plane, 10 bit per channel */

		/*
		* 2 plane YCbCr MSB aligned
		* index 0 = Y plane, [15:0] Y:x [10:6] little endian
		* index 1 = Cr:Cb plane, [31:0] Cr:x:Cb:x [10:6:10:6] little endian
		*/
		#define DRM_FORMAT_P010 fourcc_code('P', '0', '1', '0') /* 2x2 subsampled Cr:Cb plane 10 bits per channel */

		/*
		* 2 plane YCbCr MSB aligned
		* index 0 = Y plane, [15:0] Y:x [12:4] little endian
		* index 1 = Cr:Cb plane, [31:0] Cr:x:Cb:x [12:4:12:4] little endian
		*/
		#define DRM_FORMAT_P012 fourcc_code('P', '0', '1', '2') /* 2x2 subsampled Cr:Cb plane 12 bits per channel */

		/*
		* 2 plane YCbCr MSB aligned
		* index 0 = Y plane, [15:0] Y little endian
		* index 1 = Cr:Cb plane, [31:0] Cr:Cb [16:16] little endian
		*/
		#define DRM_FORMAT_P016 fourcc_code('P', '0', '1', '6') /* 2x2 subsampled Cr:Cb plane 16 bits per channel */

		/*
		* 3 plane YCbCr
		* index 0: Y plane, [7:0] Y
		@@ -237,6 +307,8 @@ extern "C" {
		#define DRM_FORMAT_MOD_VENDOR_VIVANTE 0x06
		#define DRM_FORMAT_MOD_VENDOR_BROADCOM 0x07
		#define DRM_FORMAT_MOD_VENDOR_ARM 0x08
		#define DRM_FORMAT_MOD_VENDOR_ALLWINNER 0x09

		/* add more to the end as needed */

		#define DRM_FORMAT_RESERVED ((1ULL << 56) - 1)
		@@ -571,6 +643,9 @@ extern "C" {
		* AFBC has several features which may be supported and/or used, which are
		* represented using bits in the modifier. Not all combinations are valid,
		* and different devices or use-cases may support different combinations.
		*
		* Further information on the use of AFBC modifiers can be found in
		* Documentation/gpu/afbc.rst
		*/
		#define DRM_FORMAT_MOD_ARM_AFBC(__afbc_mode) fourcc_mod_code(ARM, __afbc_mode)

		@@ -580,10 +655,18 @@ extern "C" {
		* Indicates the superblock size(s) used for the AFBC buffer. The buffer
		* size (in pixels) must be aligned to a multiple of the superblock size.
		* Four lowest significant bits(LSBs) are reserved for block size.
		*
		* Where one superblock size is specified, it applies to all planes of the
		* buffer (e.g. 16x16, 32x8). When multiple superblock sizes are specified,
		* the first applies to the Luma plane and the second applies to the Chroma
		* plane(s). e.g. (32x8_64x4 means 32x8 Luma, with 64x4 Chroma).
		* Multiple superblock sizes are only valid for multi-plane YCbCr formats.
		*/
		#define AFBC_FORMAT_MOD_BLOCK_SIZE_MASK 0xf
		#define AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 (1ULL)
		#define AFBC_FORMAT_MOD_BLOCK_SIZE_32x8 (2ULL)
		#define AFBC_FORMAT_MOD_BLOCK_SIZE_64x4 (3ULL)
		#define AFBC_FORMAT_MOD_BLOCK_SIZE_32x8_64x4 (4ULL)

		/*
		* AFBC lossless colorspace transform
		@@ -643,6 +726,35 @@ extern "C" {
		*/
		#define AFBC_FORMAT_MOD_SC (1ULL << 9)

		/*
		* AFBC double-buffer
		*
		* Indicates that the buffer is allocated in a layout safe for front-buffer
		* rendering.
		*/
		#define AFBC_FORMAT_MOD_DB (1ULL << 10)

		/*
		* AFBC buffer content hints
		*
		* Indicates that the buffer includes per-superblock content hints.
		*/
		#define AFBC_FORMAT_MOD_BCH (1ULL << 11)

		/*
		* Allwinner tiled modifier
		*
		* This tiling mode is implemented by the VPU found on all Allwinner platforms,
		* codenamed sunxi. It is associated with a YUV format that uses either 2 or 3
		* planes.
		*
		* With this tiling, the luminance samples are disposed in tiles representing
		* 32x32 pixels and the chrominance samples in tiles representing 32x64 pixels.
		* The pixel order in each tile is linear and the tiles are disposed linearly,
		* both in row-major order.
		*/
		#define DRM_FORMAT_MOD_ALLWINNER_TILED fourcc_mod_code(ALLWINNER, 1)

		#if defined(__cplusplus)
		}
		#endif

include/standard-headers/linux/ethtool.h

+38 −10

Original line number	Diff line number	Diff line
		@@ -252,9 +252,17 @@ struct ethtool_tunable {
		#define DOWNSHIFT_DEV_DEFAULT_COUNT 0xff
		#define DOWNSHIFT_DEV_DISABLE 0

		/* Time in msecs after which link is reported as down
		* 0 = lowest time supported by the PHY
		* 0xff = off, link down detection according to standard
		*/
		#define ETHTOOL_PHY_FAST_LINK_DOWN_ON 0
		#define ETHTOOL_PHY_FAST_LINK_DOWN_OFF 0xff

		enum phy_tunable_id {
		ETHTOOL_PHY_ID_UNSPEC,
		ETHTOOL_PHY_DOWNSHIFT,
		ETHTOOL_PHY_FAST_LINK_DOWN,
		/*
		* Add your fresh new phy tunable attribute above and remember to update
		* phy_tunable_strings[] in net/core/ethtool.c
		@@ -1432,6 +1440,13 @@ enum ethtool_link_mode_bit_indices {
		ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT = 29,
		ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT = 30,
		ETHTOOL_LINK_MODE_25000baseCR_Full_BIT = 31,

		/* Last allowed bit for __ETHTOOL_LINK_MODE_LEGACY_MASK is bit
		* 31. Please do NOT define any SUPPORTED_* or ADVERTISED_*
		* macro for bits > 31. The only way to use indices > 31 is to
		* use the new ETHTOOL_GLINKSETTINGS/ETHTOOL_SLINKSETTINGS API.
		*/

		ETHTOOL_LINK_MODE_25000baseKR_Full_BIT = 32,
		ETHTOOL_LINK_MODE_25000baseSR_Full_BIT = 33,
		ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT = 34,
		@@ -1453,15 +1468,24 @@ enum ethtool_link_mode_bit_indices {
		ETHTOOL_LINK_MODE_FEC_NONE_BIT = 49,
		ETHTOOL_LINK_MODE_FEC_RS_BIT = 50,
		ETHTOOL_LINK_MODE_FEC_BASER_BIT = 51,

		/* Last allowed bit for __ETHTOOL_LINK_MODE_LEGACY_MASK is bit
		* 31. Please do NOT define any SUPPORTED_* or ADVERTISED_*
		* macro for bits > 31. The only way to use indices > 31 is to
		* use the new ETHTOOL_GLINKSETTINGS/ETHTOOL_SLINKSETTINGS API.
		*/

		__ETHTOOL_LINK_MODE_LAST
		= ETHTOOL_LINK_MODE_FEC_BASER_BIT,
		ETHTOOL_LINK_MODE_50000baseKR_Full_BIT = 52,
		ETHTOOL_LINK_MODE_50000baseSR_Full_BIT = 53,
		ETHTOOL_LINK_MODE_50000baseCR_Full_BIT = 54,
		ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT = 55,
		ETHTOOL_LINK_MODE_50000baseDR_Full_BIT = 56,
		ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT = 57,
		ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT = 58,
		ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT = 59,
		ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT = 60,
		ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT = 61,
		ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT = 62,
		ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT = 63,
		ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT = 64,
		ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT = 65,
		ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT = 66,

		/* must be last entry */
		__ETHTOOL_LINK_MODE_MASK_NBITS
		};

		#define __ETHTOOL_LINK_MODE_LEGACY_MASK(base_name) \
		@@ -1569,12 +1593,13 @@ enum ethtool_link_mode_bit_indices {
		#define SPEED_50000 50000
		#define SPEED_56000 56000
		#define SPEED_100000 100000
		#define SPEED_200000 200000

		#define SPEED_UNKNOWN -1

		static inline int ethtool_validate_speed(uint32_t speed)
		{
		return speed <= INT_MAX \|\| speed == SPEED_UNKNOWN;
		return speed <= INT_MAX \|\| speed == (uint32_t)SPEED_UNKNOWN;
		}

		/* Duplex, half or full. */
		@@ -1687,6 +1712,9 @@ static inline int ethtool_validate_duplex(uint8_t duplex)
		#define ETH_MODULE_SFF_8436 0x4
		#define ETH_MODULE_SFF_8436_LEN 256

		#define ETH_MODULE_SFF_8636_MAX_LEN 640
		#define ETH_MODULE_SFF_8436_MAX_LEN 640

		/* Reset flags */
		/* The reset() operation must clear the flags for the components which
		* were actually reset. On successful return, the flags indicate the

include/standard-headers/linux/input-event-codes.h

+7 −2

Original line number	Diff line number	Diff line
		@@ -439,10 +439,12 @@
		#define KEY_TITLE 0x171
		#define KEY_SUBTITLE 0x172
		#define KEY_ANGLE 0x173
		#define KEY_ZOOM 0x174
		#define KEY_FULL_SCREEN 0x174 /* AC View Toggle */
		#define KEY_ZOOM KEY_FULL_SCREEN
		#define KEY_MODE 0x175
		#define KEY_KEYBOARD 0x176
		#define KEY_SCREEN 0x177
		#define KEY_ASPECT_RATIO 0x177 /* HUTRR37: Aspect */
		#define KEY_SCREEN KEY_ASPECT_RATIO
		#define KEY_PC 0x178 /* Media Select Computer */
		#define KEY_TV 0x179 /* Media Select TV */
		#define KEY_TV2 0x17a /* Media Select Cable */
		@@ -604,6 +606,7 @@
		#define KEY_SCREENSAVER 0x245 /* AL Screen Saver */
		#define KEY_VOICECOMMAND 0x246 /* Listening Voice Command */
		#define KEY_ASSISTANT 0x247 /* AL Context-aware desktop assistant */
		#define KEY_KBD_LAYOUT_NEXT 0x248 /* AC Next Keyboard Layout Select */

		#define KEY_BRIGHTNESS_MIN 0x250 /* Set Brightness to Minimum */
		#define KEY_BRIGHTNESS_MAX 0x251 /* Set Brightness to Maximum */
		@@ -716,6 +719,8 @@
		* the situation described above.
		*/
		#define REL_RESERVED 0x0a
		#define REL_WHEEL_HI_RES 0x0b
		#define REL_HWHEEL_HI_RES 0x0c
		#define REL_MAX 0x0f
		#define REL_CNT (REL_MAX+1)

include/standard-headers/linux/input.h

+5 −1

Original line number	Diff line number	Diff line
		@@ -23,13 +23,17 @@
		*/

		struct input_event {
		#if (HOST_LONG_BITS != 32 \|\| !defined(__USE_TIME_BITS64)) && !defined(__KERNEL)
		#if (HOST_LONG_BITS != 32 \|\| !defined(__USE_TIME_BITS64)) && !defined(__KERNEL__)
		struct timeval time;
		#define input_event_sec time.tv_sec
		#define input_event_usec time.tv_usec
		#else
		unsigned long __sec;
		#if defined(__sparc__) && defined(__arch64__)
		unsigned int __usec;
		#else
		unsigned long __usec;
		#endif
		#define input_event_sec __sec
		#define input_event_usec __usec
		#endif