Loading Makefile.hw +1 −0 Original line number Diff line number Diff line Loading @@ -10,6 +10,7 @@ include $(SRC_PATH)/rules.mak $(call set-vpath, $(SRC_PATH):$(SRC_PATH)/hw) QEMU_CFLAGS+=-I.. QEMU_CFLAGS += $(GLIB_CFLAGS) include $(SRC_PATH)/Makefile.objs Loading Makefile.target +0 −1 Original line number Diff line number Diff line Loading @@ -191,7 +191,6 @@ obj-$(CONFIG_VIRTIO) += virtio.o virtio-blk.o virtio-balloon.o virtio-net.o virt obj-y += vhost_net.o obj-$(CONFIG_VHOST_NET) += vhost.o obj-$(CONFIG_REALLY_VIRTFS) += 9pfs/virtio-9p-device.o obj-y += rwhandler.o obj-$(CONFIG_KVM) += kvm.o kvm-all.o obj-$(CONFIG_NO_KVM) += kvm-stub.o obj-y += memory.o Loading hw/an5206.c +8 −4 Original line number Diff line number Diff line Loading @@ -12,6 +12,7 @@ #include "boards.h" #include "loader.h" #include "elf.h" #include "exec-memory.h" #define KERNEL_LOAD_ADDR 0x10000 #define AN5206_MBAR_ADDR 0x10000000 Loading @@ -37,6 +38,9 @@ static void an5206_init(ram_addr_t ram_size, int kernel_size; uint64_t elf_entry; target_phys_addr_t entry; MemoryRegion *address_space_mem = get_system_memory(); MemoryRegion *ram = g_new(MemoryRegion, 1); MemoryRegion *sram = g_new(MemoryRegion, 1); if (!cpu_model) cpu_model = "m5206"; Loading @@ -52,12 +56,12 @@ static void an5206_init(ram_addr_t ram_size, env->rambar0 = AN5206_RAMBAR_ADDR | 1; /* DRAM at address zero */ cpu_register_physical_memory(0, ram_size, qemu_ram_alloc(NULL, "an5206.ram", ram_size) | IO_MEM_RAM); memory_region_init_ram(ram, NULL, "an5206.ram", ram_size); memory_region_add_subregion(address_space_mem, 0, ram); /* Internal SRAM. */ cpu_register_physical_memory(AN5206_RAMBAR_ADDR, 512, qemu_ram_alloc(NULL, "an5206.sram", 512) | IO_MEM_RAM); memory_region_init_ram(sram, NULL, "an5206.sram", 512); memory_region_add_subregion(address_space_mem, AN5206_RAMBAR_ADDR, sram); mcf5206_init(AN5206_MBAR_ADDR, env); Loading hw/arm-misc.h +4 −1 Original line number Diff line number Diff line Loading @@ -11,13 +11,16 @@ #ifndef ARM_MISC_H #define ARM_MISC_H 1 #include "memory.h" /* The CPU is also modeled as an interrupt controller. */ #define ARM_PIC_CPU_IRQ 0 #define ARM_PIC_CPU_FIQ 1 qemu_irq *arm_pic_init_cpu(CPUState *env); /* armv7m.c */ qemu_irq *armv7m_init(int flash_size, int sram_size, qemu_irq *armv7m_init(MemoryRegion *address_space_mem, int flash_size, int sram_size, const char *kernel_filename, const char *cpu_model); /* arm_boot.c */ Loading hw/armv7m.c +12 −10 Original line number Diff line number Diff line Loading @@ -156,7 +156,8 @@ static void armv7m_reset(void *opaque) flash_size and sram_size are in kb. Returns the NVIC array. */ qemu_irq *armv7m_init(int flash_size, int sram_size, qemu_irq *armv7m_init(MemoryRegion *address_space_mem, int flash_size, int sram_size, const char *kernel_filename, const char *cpu_model) { CPUState *env; Loading @@ -169,6 +170,9 @@ qemu_irq *armv7m_init(int flash_size, int sram_size, uint64_t lowaddr; int i; int big_endian; MemoryRegion *sram = g_new(MemoryRegion, 1); MemoryRegion *flash = g_new(MemoryRegion, 1); MemoryRegion *hack = g_new(MemoryRegion, 1); flash_size *= 1024; sram_size *= 1024; Loading @@ -194,12 +198,11 @@ qemu_irq *armv7m_init(int flash_size, int sram_size, #endif /* Flash programming is done via the SCU, so pretend it is ROM. */ cpu_register_physical_memory(0, flash_size, qemu_ram_alloc(NULL, "armv7m.flash", flash_size) | IO_MEM_ROM); cpu_register_physical_memory(0x20000000, sram_size, qemu_ram_alloc(NULL, "armv7m.sram", sram_size) | IO_MEM_RAM); memory_region_init_ram(flash, NULL, "armv7m.flash", flash_size); memory_region_set_readonly(flash, true); memory_region_add_subregion(address_space_mem, 0, flash); memory_region_init_ram(sram, NULL, "armv7m.sram", sram_size); memory_region_add_subregion(address_space_mem, 0x20000000, sram); armv7m_bitband_init(); nvic = qdev_create(NULL, "armv7m_nvic"); Loading Loading @@ -232,9 +235,8 @@ qemu_irq *armv7m_init(int flash_size, int sram_size, /* Hack to map an additional page of ram at the top of the address space. This stops qemu complaining about executing code outside RAM when returning from an exception. */ cpu_register_physical_memory(0xfffff000, 0x1000, qemu_ram_alloc(NULL, "armv7m.hack", 0x1000) | IO_MEM_RAM); memory_region_init_ram(hack, NULL, "armv7m.hack", 0x1000); memory_region_add_subregion(address_space_mem, 0xfffff000, hack); qemu_register_reset(armv7m_reset, env); return pic; Loading Loading
Makefile.hw +1 −0 Original line number Diff line number Diff line Loading @@ -10,6 +10,7 @@ include $(SRC_PATH)/rules.mak $(call set-vpath, $(SRC_PATH):$(SRC_PATH)/hw) QEMU_CFLAGS+=-I.. QEMU_CFLAGS += $(GLIB_CFLAGS) include $(SRC_PATH)/Makefile.objs Loading
Makefile.target +0 −1 Original line number Diff line number Diff line Loading @@ -191,7 +191,6 @@ obj-$(CONFIG_VIRTIO) += virtio.o virtio-blk.o virtio-balloon.o virtio-net.o virt obj-y += vhost_net.o obj-$(CONFIG_VHOST_NET) += vhost.o obj-$(CONFIG_REALLY_VIRTFS) += 9pfs/virtio-9p-device.o obj-y += rwhandler.o obj-$(CONFIG_KVM) += kvm.o kvm-all.o obj-$(CONFIG_NO_KVM) += kvm-stub.o obj-y += memory.o Loading
hw/an5206.c +8 −4 Original line number Diff line number Diff line Loading @@ -12,6 +12,7 @@ #include "boards.h" #include "loader.h" #include "elf.h" #include "exec-memory.h" #define KERNEL_LOAD_ADDR 0x10000 #define AN5206_MBAR_ADDR 0x10000000 Loading @@ -37,6 +38,9 @@ static void an5206_init(ram_addr_t ram_size, int kernel_size; uint64_t elf_entry; target_phys_addr_t entry; MemoryRegion *address_space_mem = get_system_memory(); MemoryRegion *ram = g_new(MemoryRegion, 1); MemoryRegion *sram = g_new(MemoryRegion, 1); if (!cpu_model) cpu_model = "m5206"; Loading @@ -52,12 +56,12 @@ static void an5206_init(ram_addr_t ram_size, env->rambar0 = AN5206_RAMBAR_ADDR | 1; /* DRAM at address zero */ cpu_register_physical_memory(0, ram_size, qemu_ram_alloc(NULL, "an5206.ram", ram_size) | IO_MEM_RAM); memory_region_init_ram(ram, NULL, "an5206.ram", ram_size); memory_region_add_subregion(address_space_mem, 0, ram); /* Internal SRAM. */ cpu_register_physical_memory(AN5206_RAMBAR_ADDR, 512, qemu_ram_alloc(NULL, "an5206.sram", 512) | IO_MEM_RAM); memory_region_init_ram(sram, NULL, "an5206.sram", 512); memory_region_add_subregion(address_space_mem, AN5206_RAMBAR_ADDR, sram); mcf5206_init(AN5206_MBAR_ADDR, env); Loading
hw/arm-misc.h +4 −1 Original line number Diff line number Diff line Loading @@ -11,13 +11,16 @@ #ifndef ARM_MISC_H #define ARM_MISC_H 1 #include "memory.h" /* The CPU is also modeled as an interrupt controller. */ #define ARM_PIC_CPU_IRQ 0 #define ARM_PIC_CPU_FIQ 1 qemu_irq *arm_pic_init_cpu(CPUState *env); /* armv7m.c */ qemu_irq *armv7m_init(int flash_size, int sram_size, qemu_irq *armv7m_init(MemoryRegion *address_space_mem, int flash_size, int sram_size, const char *kernel_filename, const char *cpu_model); /* arm_boot.c */ Loading
hw/armv7m.c +12 −10 Original line number Diff line number Diff line Loading @@ -156,7 +156,8 @@ static void armv7m_reset(void *opaque) flash_size and sram_size are in kb. Returns the NVIC array. */ qemu_irq *armv7m_init(int flash_size, int sram_size, qemu_irq *armv7m_init(MemoryRegion *address_space_mem, int flash_size, int sram_size, const char *kernel_filename, const char *cpu_model) { CPUState *env; Loading @@ -169,6 +170,9 @@ qemu_irq *armv7m_init(int flash_size, int sram_size, uint64_t lowaddr; int i; int big_endian; MemoryRegion *sram = g_new(MemoryRegion, 1); MemoryRegion *flash = g_new(MemoryRegion, 1); MemoryRegion *hack = g_new(MemoryRegion, 1); flash_size *= 1024; sram_size *= 1024; Loading @@ -194,12 +198,11 @@ qemu_irq *armv7m_init(int flash_size, int sram_size, #endif /* Flash programming is done via the SCU, so pretend it is ROM. */ cpu_register_physical_memory(0, flash_size, qemu_ram_alloc(NULL, "armv7m.flash", flash_size) | IO_MEM_ROM); cpu_register_physical_memory(0x20000000, sram_size, qemu_ram_alloc(NULL, "armv7m.sram", sram_size) | IO_MEM_RAM); memory_region_init_ram(flash, NULL, "armv7m.flash", flash_size); memory_region_set_readonly(flash, true); memory_region_add_subregion(address_space_mem, 0, flash); memory_region_init_ram(sram, NULL, "armv7m.sram", sram_size); memory_region_add_subregion(address_space_mem, 0x20000000, sram); armv7m_bitband_init(); nvic = qdev_create(NULL, "armv7m_nvic"); Loading Loading @@ -232,9 +235,8 @@ qemu_irq *armv7m_init(int flash_size, int sram_size, /* Hack to map an additional page of ram at the top of the address space. This stops qemu complaining about executing code outside RAM when returning from an exception. */ cpu_register_physical_memory(0xfffff000, 0x1000, qemu_ram_alloc(NULL, "armv7m.hack", 0x1000) | IO_MEM_RAM); memory_region_init_ram(hack, NULL, "armv7m.hack", 0x1000); memory_region_add_subregion(address_space_mem, 0xfffff000, hack); qemu_register_reset(armv7m_reset, env); return pic; Loading